Yasuhiro Ogasahara

22 papers C 2Journal 11Unranked 9
YearRankTypeTitle / Venue / Authors
2020 J jnl
Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping.
Integr.
Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike
2017 — conf
Prototype of USB stick-sized PUF module for authentication and key generation.
GCCE
Toshihiro Katashita, Yohei Hori, Yasuhiro Ogasahara
2016 C conf
Implementation of pseudo linear feedback shift register physical unclonable function on silicon.
ISCAS
Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike
2015 — conf
0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM.
COOL Chips
Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Yasuhiro Ogasahara, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada
2015 J jnl
A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM.
IEEE Micro
Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada, Yasuhiro Ogasahara
2015 J jnl
Impacts of flexible
IEICE Electron. Express
Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike
2015 — conf
Standard cell implementation of buskeeper PUF with symmetric inverters and neighboring cells for passing randomness tests.
GCCE
Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike
2014 J jnl
Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate.
IEICE Electron. Express
Toshiki Kanamoto, Hisato Inaba, Toshiharu Chiba, Yasuhiro Ogasahara
2013 J jnl
Supply Noise Suppression by Triple-Well Structure.
IEEE Trans. Very Large Scale Integr. Syst.
Yasuhiro Ogasahara, Masanori Hashimoto, Toshiki Kanamoto, Takao Onoye
2009 J jnl
All-Digital Ring-Oscillator-Based Macro for Sensing Dynamic Supply Noise Waveform.
IEEE J. Solid State Circuits
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2008 — conf
Dynamic supply noise measurement circuit composed of standard cells suitable for in-site SoC power integrity verification.
ASP-DAC
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2008 J jnl
Impact of Well Edge Proximity Effect on Timing.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Toshiki Kanamoto, Yasuhiro Ogasahara, Keiko Natsume, Kenji Yamaguchi, Hiroyuki Amishiro, Tetsuya Watanabe, Masanori Hashimoto
2008 J jnl
Measurement and Analysis of Inductive Coupling Noise in 90 nm Global Interconnects.
IEEE J. Solid State Circuits
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2007 — conf
Dynamic Supply Noise Measurement with All Digital Gated Oscillator for Evaluating Decoupling Capacitance Effect.
CICC
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2007 — conf
Impact of well edge proximity effect on timing.
ESSCIRC
Toshiki Kanamoto, Yasuhiro Ogasahara, Keiko Natsume, Kenji Yamaguchi, Hiroyuki Amishiro, Tetsuya Watanabe, Masanori Hashimoto
2007 J jnl
Quantitative Prediction of On-Chip Capacitive and Inductive Crosstalk Noise and Tradeoff between Wire Cross-Sectional Area and Inductive Crosstalk Effect.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2007 J jnl
Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement.
IEEE Trans. Circuits Syst. II Express Briefs
Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto, Takashi Sato, Takao Onoye
2006 — conf
Measurement of Inductive Coupling Effect on Timing in 90nm Global Interconnects.
CICC
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2006 — conf
Measurement results of delay degradation due to power supply noise well correlated with full-chip simulation.
CICC
Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto, Takashi Sato, Takao Onoye
2006 C conf
Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward Inductive Crosstalk Free Interconnects.
ICCD
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye
2006 J jnl
W-CDMA Channel Codec by Configurable Processors.
Intell. Autom. Soft Comput.
Masanao Ise, Yasuhiro Ogasahara, Takao Onoye, Isao Shirakawa
2005 — conf
Measurement and analysis of delay variation due to inductive coupling.
CICC
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye