Yasuhiro Nakasha

16 papers Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 9.3% PAE, 9.2-dBm
IEICE Electron. Express
Yasuhiro Nakasha, Shiro Ozaki, Yusuke Kumazaki, Naoya Okamoto, Shoichi Shiba, Masaru Sato, Naoki Hara, Toshihiro Ohki
2024 — conf
Sub-THz SC-FDE MIMO Systems with Deep Neural Network Equalization for 100 Gbps of 6G.
VTC Fall
Liang Zhou, Masafumi Tsutsui, Yasuhiro Nakasha, Shiro Ozaki, Takashi Dateki, Yusuke Kumazaki, Toshihiro Ohki
2023 J jnl
High-Efficiency 250-320GHz Power Amplifiers Using InP-Based Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.
IEICE Trans. Electron.
Yusuke Kumazaki, Shiro Ozaki, Naoya Okamoto, Naoki Hara, Yasuhiro Nakasha, Masaru Sato, Toshihiro Ohki
2022 — conf
First Demonstration of Crosstalk-Free (< -38.5 dB) 32-ch DWDM Demultiplexer on Standard Si PIC Platform.
OFC
Tomoyuki Akiyama, Motoyuki Nishizawa, Akio Sugama, Yasuhiro Nakasha, Shinsuke Tanaka, Yu Tanaka, Takeshi Hoshida
2021 — conf
Demonstration of Crosstalk-Free WDM Demultiplexing on Si Nanowire PIC Controlled by Si CMOS ASIC.
OFC
Tomoyuki Akiyama, Motoyuki Nishizawa, Akio Sugama, Yasuhiro Nakasha, Shinsuke Tanaka, Yu Tanaka, Shoichiro Oda, Takeshi Hoshida
2021 — conf
Temperature-Tolerant Crosstalk-Free WDM Demultiplexing Using Controller-Integrated Cascaded AMZ Triplet (CAT) on Si Nano-Waveguide PIC Platform.
ECOC
Tomoyuki Akiyama, Motoyuki Nishizawa, Akio Sugama, Yasuhiro Nakasha, Shinsuke Tanaka, Yu Tanaka, Takeshi Hoshida
2019 — conf
A Demultiplexer Immune from Fabrication-Error Impairments as an Enabler of Compact High-Channel-Count (> 64 ch) Dense WDM Systems on Low-End Si PIC Platforms.
OECC/PSC
Tomoyuki Akiyama, Shoichiro Oda, Seok-Hwan Jeong, Yasuhiro Nakasha, Yu Tanaka, Takeshi Hoshida
2017 J jnl
Robust Q-Band InP- and GaN-HEMT Low Noise Amplifiers.
IEICE Trans. Electron.
Masaru Sato, Yoshitaka Niida, Toshihide Suzuki, Yasuhiro Nakasha, Yoichi Kawano, Taisuke Iwai, Naoki Hara, Kazukiyo Joshin
2016 J jnl
300-GHz Amplifier in 75-nm InP HEMT Technology.
IEICE Trans. Electron.
Hiroshi Matsumura, Yoichi Kawano, Shoichi Shiba, Masaru Sato, Toshihide Suzuki, Yasuhiro Nakasha, Tsuyoshi Takahashi, Kozo Makiyama, Taisuke Iwai, Naoki Hara
2015 J jnl
Beyond 110 GHz InP-HEMT Based Mixer Module Using Flip-Chip Assembly for Precise Spectrum Analysis.
IEICE Trans. Electron.
Shoichi Shiba, Masaru Sato, Hiroshi Matsumura, Yoichi Kawano, Tsuyoshi Takahashi, Toshihide Suzuki, Yasuhiro Nakasha, Taisuke Iwai, Naoki Hara
2015 J jnl
Foreword.
IEICE Trans. Electron.
Yasuhiro Nakasha
2013 — conf
Submillimeter-wave InP HEMT amplifiers with current-reuse topology.
RWS
Masaru Sato, Shoichi Shiba, Hiroshi Matsumura, Tsuyoshi Takahashi, Toshihide Suzuki, Yasuhiro Nakasha, Naoki Hara
2011 J jnl
Performance Analysis of a 10-Gb/s Millimeter-Wave Impulse Radio Transmitter.
IEICE Trans. Electron.
Yasuhiro Nakasha, Naoki Hara, Kiyomichi Araki
2007 J jnl
A 50-Gbit/s 450-mW Full-Rate 4: 1 Multiplexer With Multiphase Clock Architecture in 0.13-µm InP HEMT Technology.
IEEE J. Solid State Circuits
Toshihide Suzuki, Yoichi Kawano, Yasuhiro Nakasha, Shinji Yamaura, Tsuyoshi Takahashi, Kozo Makiyama, Tatsuya Hirose
2002 J jnl
A 43-Gb/s full-rate-clock 4: 1 multiplexer in InP-based HEMT technology.
IEEE J. Solid State Circuits
Yasuhiro Nakasha, Toshihide Suzuki, Hideki Kano, Kouji Tsukashima, Akio Ohya, Ken Sawada, Kozo Makiyama, Tsuyoshi Takahashi, Masahiro Nishi, Tatsuya Hirose, Masahiko Takikawa, Yuu Watanabe
1993 J jnl
A 9.6-Gb/s HEMT ATM switch LSI with event-controlled FIFO.
IEEE J. Solid State Circuits
Yuu Watanabe, Yasuhiro Nakasha, Yuji Kato, Kohichiro Odani, Masayuki Abe