Yasuhiro Morita

13 papers A 1Journal 9Unranked 3
YearRankTypeTitle / Venue / Authors
2010 J jnl
An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing.
IEEE J. Solid State Circuits
Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Masayuki Mizuno, Tadahiro Kuroda
2009 — conf
Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing.
ISSCC
Yoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Tadahiro Kuroda, Masayuki Mizuno
2008 J jnl
A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing.
IEICE Trans. Electron.
Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Shunsuke Okumura, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 J jnl
Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering.
IEEE Trans. Very Large Scale Integr. Syst.
Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 — conf
Quality of a Bit (QoB): A New Concept in Dependable SRAM.
ISQED
Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto
2007 — conf
A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing.
ISVLSI
Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2007 J jnl
Area Comparison between 6T and 8T SRAM Cells in Dual-
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2007 J jnl
Area Optimization in 6T and 8T SRAM Cells Considering
IEICE Trans. Electron.
Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
A 0.3-V Operating,
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Kentaro Kawakami, Junichi Miyakoshi, Shinji Mikami, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
A Feed-Forward Dynamic VDD-VBB-Frequency Management for Low Power Motion Video Compression on 90NM Risc Processor.
Intell. Autom. Soft Comput.
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Hideo Ohira, Masayuki Miyama, Masahiko Yoshimoto
2006 A conf
A two-port SRAM for real-time video processor saving 53% of bitline power with majority logic and data-bit reordering.
ISLPED
Hidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 J jnl
Vertical Partitioning Method for Secret Sharing Distributed Database System.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Toshiyuki Miyamoto, Yasuhiro Morita, Sadatoshi Kumagai
2005 J jnl
Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama, Masahiko Yoshimoto