Yasufumi Sakai

22 papers B 2C 2Misc 2Journal 6Unranked 10

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Greedy search algorithm for partial quantization of convolutional neural networks inspired by submodular optimization. Neural Comput. Appl. Satoki Tsuji, Fuyuka Yamada, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai
2025	J	`jnl`	Knowledge Distillation Framework for Accelerating High-Accuracy Neural Network-Based Molecular Dynamics Simulations. CoRR Naoki Matsumura, Yuta Yoshimoto, Yuto Iwasaki, Meguru Yamazaki, Yasufumi Sakai
2025	J	`jnl`	LaMM: Semi-Supervised Pre-Training of Large-Scale Materials Models. CoRR Yosuke Oyama, Yusuke Majima, Eiji Ohta, Yasufumi Sakai
2025	J	`jnl`	S-DFP: shifted dynamic fixed point for quantized deep neural network training. Neural Comput. Appl. Yasufumi Sakai, Yutaka Tamiya
2024	B	`conf`	Active Learning for Graph Neural Networks Training in Catalyst Energy Prediction. IJCNN Yasufumi Sakai, Naoki Matsumura, Atsuki Inoue, Hiroshi Kawaguchi, Thang Dang, Atsushi Ishikawa, Árni Björn Höskuldsson, Egill Skúlason
2023	C	`conf`	A Mixed-Precision Quantization Method without Accuracy Degradation Using Semilayers. ACML Kengo Matsumoto, Tomoya Matsuda, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2023	—	`conf`	Self-Supervised Learning with Atom Replacement for Catalyst Energy Prediction by Graph Neural Networks. INNS DLIA@IJCNN Yasufumi Sakai, Thang Dang, Shigeki Fukuta, Koichi Shirahata, Atsushi Ishikawa, Atsuki Inoue, Hiroshi Kawaguchi, Árni Björn Höskuldsson, Egill Skúlason
2023	—	`conf`	Semilayer-Wise Partial Quantization Without Accuracy Degradation or Back Propagation. ICANN (9) Tomoya Matsuda, Kengo Matsumoto, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2022	B	`conf`	Automatic Pruning Rate Derivation for Structured Pruning of Deep Neural Networks. ICPR Yasufumi Sakai, Akinori Iwakawa, Tsuguchika Tabaru, Atsuki Inoue, Hiroshi Kawaguchi
2022	—	`conf`	Channel-wise quantization without accuracy degradation using Δloss analysis. ICMLT Kazuki Okado, Kengo Matsumoto, Atsuki Inoue, Hiroshi Kawaguchi, Yasufumi Sakai
2022	Misc	`conf`	Regularizing Data for Improving Execution Time of NLP Model. FLAIRS Thang Dang, Yasufumi Sakai, Tsuguchika Tabaru, Akihiko Kasagi
2022	—	`conf`	Structured Pruning with Automatic Pruning Rate Derivation for Image Processing Neural Networks. ISMSI Yasufumi Sakai, Akinori Iwakawa, Tsuguchika Tabaru
2021	Misc	`conf`	A High-Speed Neural Architecture Search Considering the Number of Weights. KI Fuyuka Yamada, Satoki Tsuji, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai
2021	—	`conf`	Efficient and Large Scale Pre-training Techniques for Japanese Natural Language Processing. CANDAR Akihiko Kasagi, Masahiro Asaoka, Akihiro Tabuchi, Yosuke Oyama, Takumi Honda, Yasufumi Sakai, Thang Dang, Tsuguchika Tabaru
2021	C	`conf`	Greedy Search Algorithm for Mixed Precision in Post-Training Quantization of Convolutional Neural Network Inspired by Submodular Optimization. ACML Satoki Tsuji, Hiroshi Kawaguchi, Atsuki Inoue, Yasufumi Sakai, Fuyuka Yamada
2019	—	`conf`	DropOut and DropConnect for Reliable Neuromorphic Inference under Energy and Bandwidth Constraints in Network Connectivity. AICAS Yasufumi Sakai, Bruno U. Pedroni, Siddharth Joshi, Abraham Akinin, Gert Cauwenberghs
2019	J	`jnl`	Dropout and DropConnect for Reliable Neuromorphic Inference Under Communication Constraints in Network Connectivity. IEEE J. Emerg. Sel. Topics Circuits Syst. Yasufumi Sakai, Bruno U. Pedroni, Siddharth Joshi, Satoshi Tanabe, Abraham Akinin, Gert Cauwenberghs
2019	—	`conf`	Neural-network assistance to calculate precise eigenvalue for fitness evaluation of real product design. GECCO (Companion) Yukito Tsunoda, Takahiro Notsu, Yasufumi Sakai, Naoki Hamada, Toshihiko Mori, Teruo Ishihara, Atsuki Inoue
2016	—	`conf`	3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS. ISSCC Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata, Yasufumi Sakai, Hiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Shigeaki Kawai, Tomoyuki Arai, Hirohito Higashi, Naoaki Naka, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura
2016	—	`conf`	A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS. VLSI Circuits Hiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Noriaki Shirai, Shigeaki Kawai, Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata, Yasufumi Sakai, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura, Yutaka Ide, Kazuhiro Terashima, Hirohito Higashi, Tomokazu Higuchi, Naoaki Naka
2014	—	`conf`	3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE. ISSCC Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Seitaro Kawai, Shinji Yamaura, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori
2014	J	`jnl`	A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE. IEEE J. Solid State Circuits Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Shigeaki Kawai, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori