Yanqing Zhang - RankMe

39 papers A* 7A 9B 1C 1Journal 11Unranked 10

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	ChipVQA: Benchmarking Visual Language Models for Chip Design. DATE Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren
2025	A*	`conf`	GEM: GPU-Accelerated Emulator-Inspired RTL Simulation. DAC Zizheng Guo, Yanqing Zhang, Runsheng Wang, Yibo Lin, Haoxing Ren
2025	—	`conf`	Invited Paper: MLCAD 2025 Contest on ReSynthAI: Physical-aware Logic Resynthesis using AI. MLCAD Vikram Gopalakrishnan, Atmadip Dey, Rongjian Liang, Yanqing Zhang, Haoxing Ren, Vidya A. Chhabria
2025	—	`conf`	SimPart: A Simple Yet Effective Replication-Aided Partitioning Algorithm for Logic Simulation on GPU. Euro-Par (3) Yi-Hua Chung, Shui Jiang, Wan-Luan Lee, Yanqing Zhang, Haoxing Ren, Tsung-Yi Ho, Tsung-Wei Huang
2024	A	`conf`	BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation. DATE Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu
2024	J	`jnl`	BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation. CoRR Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu
2024	A	`conf`	GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method. ICCAD Yanqing Zhang, Haoxing Ren, Brucek Khailany
2023	A*	`conf`	GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. DAC Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang
2023	J	`jnl`	Machine Learning and Algorithms: Let Us Team Up for EDA. IEEE Des. Test Haoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang
2022	B	`conf`	From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. ICPP Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang
2022	J	`jnl`	GATSPI: GPU Accelerated Gate-Level Simulation for Power Improvement. CoRR Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany
2022	A*	`conf`	GATSPI: GPU accelerated gate-level simulation for power improvement. DAC Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany
2022	A	`conf`	Why are Graph Neural Networks Effective for EDA Problems?: (Invited Paper). ICCAD Haoxing Ren, Siddhartha Nath, Yanqing Zhang, Hao Chen, Mingjie Liu
2022	—	`conf`	XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. MLCAD Vidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany
2021	A	`conf`	2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. ICCAD Ghasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany
2021	A	`conf`	MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. DATE Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar
2021	J	`jnl`	Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2020	J	`jnl`	A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2020	J	`jnl`	Accelerating Chip Design With Machine Learning. IEEE Micro Brucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally
2020	—	`conf`	FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. ASP-DAC Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza
2020	J	`jnl`	FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. CoRR Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza
2020	A*	`conf`	GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. DAC Yanqing Zhang, Haoxing Ren, Brucek Khailany
2020	J	`jnl`	MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification. CoRR Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar
2020	A	`conf`	Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). ICCAD Yanqing Zhang, Haoxing Ren, Brucek Khailany
2020	A	`conf`	Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). ICCAD Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany
2019	—	`conf`	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	A	`conf`	MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2019	A*	`conf`	PRIMAL: Power Inference using Machine Learning. DAC Yuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang
2019	A*	`conf`	Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2018	A*	`conf`	A modular digital VLSI flow for high-productivity SoC design. DAC Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer
2015	—	`conf`	21.3 A 6.45μW self-powered IoT SoC with integrated energy-harvesting power management and ULP asymmetric radios. ISSCC Alicia Klinefelter, Nathan E. Roberts, Yousef Shakhsheer, Patricia González, Aatmesh Shrivastava, Abhishek Roy, Kyle Craig, Muhammad Faisal, James Boley, Seunghyun Oh, Yanqing Zhang, Divya Akella, David D. Wentzloff, Benton H. Calhoun
2014	—	`conf`	Fast, accurate variation-aware path timing computation for sub-threshold circuits. ISQED Yanqing Zhang, Benton H. Calhoun
2013	J	`jnl`	A Batteryless 19 µW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications. IEEE J. Solid State Circuits Yanqing Zhang, Fan Zhang, Yousef Shakhsheer, Jason Silver, Alicia Klinefelter, Manohar Nagaraju, James Boley, Jagdish Nayayan Pandey, Aatmesh Shrivastava, Eric J. Carlson, Austin Wood, Benton H. Calhoun, Brian P. Otis
2012	J	`jnl`	A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC. IEEE Trans. Circuits Syst. II Express Briefs Alicia Klinefelter, Yanqing Zhang, Brian P. Otis, Benton H. Calhoun
2012	—	`conf`	A batteryless 19μW MICS/ISM-band energy harvesting body area sensor node SoC. ISSCC Fan Zhang, Yanqing Zhang, Jason Silver, Yousef Shakhsheer, Manohar Nagaraju, Alicia Klinefelter, Jagdish Nayayan Pandey, James Boley, Eric J. Carlson, Aatmesh Shrivastava, Brian P. Otis, Benton H. Calhoun
2012	—	`conf`	A custom processor for node and power management of a battery-less body sensor node in 130nm CMOS. CICC Yousef Shakhsheer, Yanqing Zhang, Brian P. Otis, Benton H. Calhoun
2012	J	`jnl`	Body Sensor Networks: A Holistic Approach From Silicon to Users. Proc. IEEE Benton H. Calhoun, John C. Lach, John A. Stankovic, David D. Wentzloff, Kamin Whitehouse, Adam T. Barth, Jonathan K. Brown, Qiang Li, Seunghyun Oh, Nathan E. Roberts, Yanqing Zhang
2010	C	`conf`	System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms. ISCAS Benton H. Calhoun, Sudhanshu Khanna, Yanqing Zhang, Joseph F. Ryan, Brian P. Otis