Yannis P. Tsividis

102 papers A* 2A 1C 12Misc 2Journal 53Unranked 32
YearRankTypeTitle / Venue / Authors
2024 J jnl
INTIACC: A Programmable Floating- Point Accelerator for Partial Differential Equations.
IEEE J. Solid State Circuits
Paul Xuanyuanliang Huang, Yannis P. Tsividis, Mingoo Seok
2024 A conf
SPADES: A 0.54-GFLOPS/W Sparse Matrix Vector Multiplication Accelerator Featuring On-the-Fly GZIP Decompression for 3.36X Reduction in Off-Chip Data Movement.
ISLPED
Paul Xuanyuanliang Huang, Yannis P. Tsividis, Mingoo Seok
2022 — conf
INTIACC: A 32-bit Floating-Point Programmable Custom-ISA Accelerator for Solving Classes of Partial Differential Equations.
ESSCIRC
Paul Xuanyuanliang Huang, Daniel Jang, Yannis P. Tsividis, Mingoo Seok
2019 J jnl
Signal Encoding and Processing in Continuous Time Using a Cascade of Digital Delays.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sharvil Patil, Suhas Gundu Rao, Yu Chen, Yannis P. Tsividis
2018 — conf
A Case Study in Analog Co-Processing for Solving Stochastic Differential Equations.
DSP
Yipeng Huang, Ning Guo, Simha Sethumadhavan, Mingoo Seok, Yannis P. Tsividis
2018 J jnl
A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption.
IEEE J. Solid State Circuits
Yu Chen, Xiaoyang Zhang, Yong Lian, Rajit Manohar, Yannis P. Tsividis
2018 J jnl
Corrections to "Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time".
IEEE J. Solid State Circuits
Ning Guo, Yipeng Huang, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis
2017 J jnl
Analog Computing in a Modern Context: A Linear Algebra Accelerator Case Study.
IEEE Micro
Yipeng Huang, Ning Guo, Mingoo Seok, Yannis P. Tsividis, Simha Sethumadhavan
2017 — conf
Design of tunable digital delay cells.
CICC
Yu Chen, Rajit Manohar, Yannis P. Tsividis
2017 A* conf
Hybrid analog-digital solution of nonlinear partial differential equations.
MICRO
Yipeng Huang, Ning Guo, Mingoo Seok, Yannis P. Tsividis, Kyle T. Mandli, Simha Sethumadhavan
2017 Misc conf
Signal processing in continuous time using asynchronous techniques.
ACSSC
Yu Chen, Yannis P. Tsividis
2016 J jnl
A 3-10 fJ/conv-step Error-Shaping Alias-Free Continuous-Time ADC.
IEEE J. Solid State Circuits
Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis
2016 C conf
Design considerations for variable-rate digital signal processing.
ISCAS
Yu Chen, Yannis P. Tsividis
2016 C conf
Digital processing of signals produced by voltage-controlled-oscillator-based continuous-time ADCs.
ISCAS
Sharvil Patil, Yannis P. Tsividis
2016 J jnl
Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time.
IEEE J. Solid State Circuits
Ning Guo, Yipeng Huang, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis
2016 A* conf
Evaluation of an Analog Accelerator for Linear Algebra.
ISCA
Yipeng Huang, Ning Guo, Mingoo Seok, Yannis P. Tsividis, Simha Sethumadhavan
2015 — conf
A 3-10fJ/conv-step 0.0032mm
VLSIC
Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis
2015 — conf
Continuous-time hybrid computation with programmable nonlinearities.
ESSCIRC
Ning Guo, Yipeng Huang, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis
2015 J jnl
Derivative Level-Crossing Sampling.
IEEE Trans. Circuits Syst. II Express Briefs
Pablo Martínez-Nuevo, Sharvil Patil, Yannis P. Tsividis
2015 J jnl
Improving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity.
IEEE Trans. Very Large Scale Integr. Syst.
Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick
2014 J jnl
A Flexible, Event-Driven Digital Filter With Frequency Response Independent of Input Sample Rate.
IEEE J. Solid State Circuits
Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis
2013 — conf
A flexible, clockless digital filter.
ESSCIRC
Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis
2013 J jnl
An Event-driven Clockless Level-Crossing ADC With Signal-Dependent Adaptive Resolution.
IEEE J. Solid State Circuits
Colin Weltin-Wu, Yannis P. Tsividis
2012 J jnl
A Case for Hybrid Discrete-Continuous Architectures.
IEEE Comput. Archit. Lett.
Simha Sethumadhavan, Ryan Roberts, Yannis P. Tsividis
2012 — conf
An event-driven, alias-free ADC with signal-dependent resolution.
VLSIC
Colin Weltin-Wu, Yannis P. Tsividis
2012 C conf
Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications.
ICCD
Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick
2012 J jnl
Event-Driven GHz-Range Continuous-Time Digital Signal Processor With Activity-Dependent Power Dissipation.
IEEE J. Solid State Circuits
Mariya Kurchuk, Colin Weltin-Wu, Dominique Morche, Yannis P. Tsividis
2012 J jnl
Internally Non-LTI Systems Based on Delays, With Application to Companding Signal Processors.
IEEE Trans. Circuits Syst. II Express Briefs
Tao Mai, Yannis P. Tsividis
2011 Misc conf
Direct processing of mpeg audio using companding and BFP techniques.
ICASSP
Christos Vezyrtzis, Aaron E. Klein, Dan Ellis, Yannis P. Tsividis
2011 J jnl
Externally Linear Discrete-Time Systems With Application to Instantaneously Companding Digital Signal Processors.
IEEE Trans. Circuits Syst. I Regul. Pap.
Aaron E. Klein, Yannis P. Tsividis
2011 — conf
GHz-range continuous-time programmable digital FIR with power dissipation that automatically adapts to signal activity.
ISSCC
Mariya Kurchuk, Colin Weltin-Wu, Dominique Morche, Yannis P. Tsividis
2010 C conf
Energy-efficient asynchronous delay element with wide controllability.
ISCAS
Mariya Kurchuk, Yannis P. Tsividis
2010 J jnl
Event-Driven Data Acquisition and Digital Signal Processing - A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs
Yannis P. Tsividis
2010 — conf
Event-driven data acquisition and continuous-time digital signal processing.
CICC
Yannis P. Tsividis
2010 C conf
Event-driven, continuous-time ADCs and DSPs for adapting power dissipation to signal activity.
ISCAS
Yannis P. Tsividis
2010 J jnl
Externally linear time invariant digital signal processors.
IEEE Trans. Signal Process.
Aaron E. Klein, Yannis P. Tsividis
2010 J jnl
Signal-Dependent Variable-Resolution Clockless A/D Conversion With Application to Continuous-Time Digital Signal Processing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mariya Kurchuk, Yannis P. Tsividis
2009 J jnl
Analysis and simulation of continuous-time digital signal processors.
Signal Process.
Bob Schell, Yannis P. Tsividis
2009 C conf
Processing of Signals using Level-crossing Sampling.
ISCAS
Christos Vezyrtzis, Yannis P. Tsividis
2009 C conf
Signal-dependent Variable-resolution Quantization for Continuous-time Digital Signal Processing.
ISCAS
Mariya Kurchuk, Yannis P. Tsividis
2008 J jnl
A 2.4-GHz ISM-Band Sliding-IF Receiver With a 0.5-V Supply.
IEEE J. Solid State Circuits
Nebojsa Stanic, Ajay Balankutty, Peter R. Kinget, Yannis P. Tsividis
2008 — conf
A Clockless ADC/DSP/DAC System with Activity-Dependent Power Dissipation and No Aliasing.
ISSCC
Bob Schell, Yannis P. Tsividis
2008 J jnl
A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation.
IEEE J. Solid State Circuits
Bob Schell, Yannis P. Tsividis
2008 J jnl
A Low Power Tunable Delay Element Suitable for Asynchronous Delays of Burst Information.
IEEE J. Solid State Circuits
Bob Schell, Yannis P. Tsividis
2007 J jnl
A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation.
IEEE J. Solid State Circuits
Atsushi Yoshizawa, Yannis P. Tsividis
2007 C conf
Analysis of Continuous-Time Digital Signal Processors.
ISCAS
Bob Schell, Yannis P. Tsividis
2007 J jnl
Correction to "A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation".
IEEE J. Solid State Circuits
Atsushi Yoshizawa, Yannis P. Tsividis
2007 — conf
Instantaneously Companding Digital Signal Processors.
ICASSP (3)
Aaron E. Klein, Yannis P. Tsividis
2006 — conf
A Blocker-Vigilant Channel-Select Filter with Adaptive IIP3 and Power Dissipation.
ISSCC
Atsushi Yoshizawa, Yannis P. Tsividis
2006 J jnl
A Continuous-Time Programmable Digital FIR Filter.
IEEE J. Solid State Circuits
Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis
2006 J jnl
A VCF Loss-Control Tuning Loop for Q -Enhanced LC Filters.
IEEE Trans. Circuits Syst. II Express Briefs
Shaorui Li, Nebojsa Stanic, Yannis P. Tsividis
2006 J jnl
A VLSI analog computer/digital computer accelerator.
IEEE J. Solid State Circuits
Glenn E. R. Cowan, Robert C. Melville, Yannis P. Tsividis
2006 — conf
Companding Digital Signal Processors.
ICASSP (3)
Aaron E. Klein, Yannis P. Tsividis
2006 J jnl
Dynamic power optimization of active filters with application to zero-IF receivers.
IEEE J. Solid State Circuits
Mehmet Tamer Ozgun, Yannis P. Tsividis, Gangadhar Burra
2006 J jnl
Mixed-Domain Systems and Signal Processing Based on Input Decomposition.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yannis P. Tsividis
2006 J jnl
Ultra-Low Voltage Analog Integrated Circuits.
IEICE Trans. Electron.
Shouri Chatterjee, Yannis P. Tsividis, Peter R. Kinget
2005 J jnl
0.5-V analog circuit techniques and their application in OTA and filter design.
IEEE J. Solid State Circuits
Shouri Chatterjee, Yannis P. Tsividis, Peter R. Kinget
2005 — conf
A continuous-time programmable digital FIR filter.
CICC
Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis
2005 — conf
Continuous-Time Digital Signal Processors.
ASYNC
Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis
2005 — conf
Continuous-time DSPs, analog/digital computers and other mixed-domain circuits.
ESSCIRC
Yannis P. Tsividis, Glenn E. R. Cowan, Yee William Li, Kenneth L. Shepard
2004 J jnl
A "divide and conquer" technique for implementing wide dynamic range continuous-time filters.
IEEE J. Solid State Circuits
Yorgos Palaskas, Yannis P. Tsividis, Vladimir I. Prodanov, Vito Boccuzzi
2004 — conf
A 0.5-V bulk-input fully differential operational transconductance amplifier.
ESSCIRC
Shouri Chatterjee, Yannis P. Tsividis, Peter R. Kinget
2004 — conf
Analysis of oscillator amplitude control, and its application to automatic tuning of quality factor for active LC filters.
ISCAS (4)
Shaorui Li, Yannis P. Tsividis
2004 — conf
Digital signal processing in continuous time: a possibility for avoiding aliasing and reducing quantization error.
ICASSP (2)
Yannis P. Tsividis
2004 — conf
Mixing domains in signal processing.
ISCAS (1)
Yannis P. Tsividis
2003 — conf
A power efficient channel selection filter/coarse AGC with no range switching transients.
CICC
Yorgos Palaskas, Yannis P. Tsividis, Vito Boccuzzi
2003 J jnl
Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints.
IEEE Trans. Circuits Syst. II Express Briefs
Yorgos Palaskas, Yannis P. Tsividis
2003 J jnl
Micropower low-voltage analog filter in a digital CMOS process.
IEEE J. Solid State Circuits
Nagendra Krishnapura, Yannis P. Tsividis
2003 — conf
Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters.
ISCAS (1)
Yorgos Palaskas, Yannis P. Tsividis
2002 J jnl
Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers.
IEEE J. Solid State Circuits
Atsushi Yoshizawa, Yannis P. Tsividis
2002 — conf
Design considerations and experimental evaluation of a syllabic companding audio frequency filter.
ISCAS (3)
George Palaskas, Yannis P. Tsividis
2002 J jnl
Design techniques for automatically tuned integrated gigahertz-range active LC filters.
IEEE J. Solid State Circuits
Dandan Li, Yannis P. Tsividis
2001 — conf
"Noninvasive" techniques for syllabic companding in signal processors.
ISCAS (1)
László Tóth, George Palaskas, Yannis P. Tsividis
2001 — conf
A "divide and conquer" technique for the design of wide dynamic range continuous time filters.
ISCAS (1)
George Palaskas, Yannis P. Tsividis
2001 — conf
An anti-blocker structure MOSFET-C filter for a direct conversion receiver.
CICC
Atsushi Yoshizawa, Yannis P. Tsividis
2001 J jnl
Continuous-time filters in telecommunications chips.
IEEE Commun. Mag.
Yannis P. Tsividis
2001 — conf
Generalized chopper stabilization.
ISCAS (1)
László Tóth, Yannis P. Tsividis
2001 J jnl
Noise and power reduction in filters through the use of adjustable biasing.
IEEE J. Solid State Circuits
Nagendra Krishnapura, Yannis P. Tsividis
2000 J jnl
Widely programmable high-frequency continuous-time filters in digital CMOS technology.
IEEE J. Solid State Circuits
Shanthi Pavan, Yannis P. Tsividis, Krishnaswamy Nagaraj
1999 — conf
Modeling of accumulation MOS capacitors for analog design in digital VLSI processes.
ISCAS (6)
Shanthi Pavan, Yannis P. Tsividis, Krishnaswamy Nagaraj
1999 — conf
Signal analysis of externally linear filters.
ISCAS (6)
G. Efthivoulidis, Yannis P. Tsividis
1998 J jnl
Mixed analog-digital fuzzy logic controller with continuous-amplitude fuzzy inferences and defuzzification.
IEEE Trans. Fuzzy Syst.
Stamatis Bouras, Manousos Kotronakis, Ken Suyama, Yannis P. Tsividis
1997 J jnl
Six-terminal MOSFET's: modeling and applications in highly linear, electronically tunable resistors.
IEEE J. Solid State Circuits
Kostas Vavelidis, Yannis P. Tsividis, Frank Op't Eynde, Yannis Papananos
1996 J jnl
A Si 1.8 GHz RLC filter with tunable center frequency and quality factor.
IEEE J. Solid State Circuits
Spyros Pipilos, Yannis P. Tsividis, Josef Fenk, Yannis Papananos
1996 — conf
Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop.
ICECS
Yannis Papananos, Yannis P. Tsividis
1996 — conf
Design considerations and implementation of very low frequency continuous-time CMOS monolithic filters.
ICECS
Yannis Papananos, Theodore Georgantas, Yannis P. Tsividis
1994 C conf
Design of Active RLC Integrated Filters with Application in the GHz Range.
ISCAS
Spyros Pipilos, Yannis P. Tsividis
1994 J jnl
Integrated continuous-time filter design - an overview.
IEEE J. Solid State Circuits
Yannis P. Tsividis
1994 J jnl
MOSFET modeling for analog circuit CAD: problems and prospects.
IEEE J. Solid State Circuits
Yannis P. Tsividis, Ken Suyama
1993 C conf
A Comparative Study of Five Integrator Structures for Monolithic Continuous-time Filters.
ISCAS
Theodore Georgantas, Yannis Papananos, Yannis P. Tsividis
1993 C conf
Bounds on Noise in Integrated Active-RC and MOSFET-C Filters.
ISCAS
László Tóth, V. Gopinathan, Yannis P. Tsividis, Nicholas G. Maratos
1993 J jnl
Comment on "A nonlinear CMOS analog cell for VLSI signal and information processing".
IEEE J. Solid State Circuits
Yannis P. Tsividis
1993 C conf
Design Considerations for Highly Linear Electronically Tunable Resistor.
ISCAS
Kostas Vavelidis, Yannis P. Tsividis
1992 J jnl
A reconfigurable VLSI neural network.
IEEE J. Solid State Circuits
Srinagesh Satyanarayana, Yannis P. Tsividis, Hans Peter Graf
1990 J jnl
Design considerations for high-frequency continuous-time filters and implementation of an antialiasing filter for digital video.
IEEE J. Solid State Circuits
Venugopal Gopinathan, Yannis P. Tsividis, Khen-Sang Tan, Richard K. Hester
1990 J jnl
Simulation of mixed switched-capacitor/digital networks with signal-driven switches.
IEEE J. Solid State Circuits
Ken Suyama, San-Chin Fang, Yannis P. Tsividis
1990 J jnl
Transistor-only frequency-selective circuits.
IEEE J. Solid State Circuits
Lih-Jiuan Pu, Yannis P. Tsividis
1989 — conf
A Reconfigurable Analog VLSI Neural Network Chip.
NIPS
Srinagesh Satyanarayana, Yannis P. Tsividis, Hans Peter Graf
1988 J jnl
Analog MOS circuit techniques in the VLSI implementation of neural networks.
Neural Networks
Srinagesh Satyanarayana, Ken Suyama, Yannis P. Tsividis
1988 J jnl
Fully differential operational amplifiers with accurate output balancing.
IEEE J. Solid State Circuits
Mihai Banu, John M. Khoury, Yannis P. Tsividis
1985 J jnl
Time- and Frequency-Domain Analysis of Linear Switched-Capacitor Networks Using State Charge Variables.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
San-Chin Fang, Yannis P. Tsividis, Omar Wing
1984 J jnl
Problems in Precision Modeling of the MOS Transistor for Analog Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yannis P. Tsividis, Guido Masetti