Yang Zhang

11 papers A* 1B 1Misc 1Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2025 — conf
A 52.03TOPS/W DCIM-Based Accelerator with FlashAttention and Sparsity-Aware Alignment for LLMs.
CICC
Bo Liu, Xingyu Xu, Yang Zhang, Xilong Kang, Qingwen Wei, Zihan Zou, Jun Yang, Hao Cai, Xin Si
2025 J jnl
KV-Cache Oriented Query-Aware Sparse Attention Accelerator With Cross-Stage Precision-Configurable Digital CIM.
IEEE Trans. Circuits Syst. II Express Briefs
Yang Zhang, Xilong Kang, Weixuan Wang, Yizhi Ding, Lizheng Ren, Yiran Zhang, Ruiqi Tan, Zhen Wang, Hao Cai, Bo Liu
2024 A* conf
FDCA: Fine-grained Digital-CIM based CNN Accelerator with Hybrid Quantization and Weight-Stationary Dataflow.
DAC
Bo Liu, Qingwen Wei, Yang Zhang, Xingyu Xu, Zihan Zou, Xinxiang Huang, Xin Si, Hao Cai
2024 J jnl
Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bo Liu, Xinxiang Huang, Yang Zhang, Guang Yang, Han Yan, Chen Zhang, Zejv Li, Yuanhao Wang, Hao Cai
2023 — conf
An Energy-Efficient MAC Design with Error Compensation Using Hybrid Approximate Logic Synthesis.
ICTA
Qingwen Wei, Yang Zhang, Xingyu Xu, Hao Cai, Bo Liu
2023 Misc conf
Work-in-Process: Error-Compensation-Based Energy-Efficient MAC Unit for CNNs.
CASES
Xingyu Xu, Qingwen Wei, Yang Zhang, Hao Cai, Bo Liu
2018 B conf
A Light CNN based Method for Hand Detection and Orientation Estimation.
ICPR
Li Yang, Zhi Qi, Zeheng Liu, Shanshan Zhou, Yang Zhang, Hao Liu, Jianhui Wu, Longxing Shi
2017 J jnl
An artificial neural network model of LRU-cache misses on out-of-order embedded processors.
Microprocess. Microsystems
Kecheng Ji, Ming Ling, Yang Zhang, Longxing Shi
2014 J jnl
A method for estimating the 3D rendering performance of the SoC in the early design stage.
IEICE Electron. Express
Zhen Xie, Yang Zhang, Longxing Shi
2014 J jnl
An improved memory system simulator based on DRAMSim2.
IEICE Electron. Express
Zhen Xie, Yang Zhang, Jun Yang, Longxing Shi
2014 — conf
Hierarchical Pipeline Optimization of Coarse Grained Reconfigurable Processor for Multimedia Applications.
IPDPS Workshops
Chen Mei, Peng Cao, Yang Zhang, Bo Liu, Leibo Liu