Yang Zhang

12 papers A* 1A 1C 1Misc 1Journal 7Unranked 1
YearRankTypeTitle / Venue / Authors
2021 J jnl
EnTiered-ReRAM: An Enhanced Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.
IEEE Access
Yang Zhang, Zhibin Yu, Liang Gu, Chengning Wang, Dan Feng
2021 J jnl
Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chengning Wang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Bing Wu, Wei Zhao, Linghao Song, Yang Zhang, Jie Xu, Xueliang Wei, Yiran Chen
2021 J jnl
Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage.
IEEE Trans. Computers
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Wei Zhao, Yang Zhang, Yiran Chen
2020 J jnl
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Yang Zhang
2019 J jnl
Cross-point Resistive Memory: Nonideal Properties and Solutions.
ACM Trans. Design Autom. Electr. Syst.
Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Zheng Li, Jiayi Chang, Yang Zhang, Bing Wu, Jie Xu, Wei Zhao, Yilin Li, Ruoxi Ren
2019 J jnl
FvRS: Efficiently identifying performance-critical data for improving performance of big data processing.
Future Gener. Comput. Syst.
Gaoxiang Xu, Zhipeng Tan, Dan Feng, Laurence T. Yang, Wei Zhou, Xinyan Zhang, Yang Zhang, Jie Xu
2019 Misc conf
Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.
MSST
Yang Zhang, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Jie Xu
2018 A conf
Aliens: a novel hybrid architecture for resistive random-access memory.
ICCAD
Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Shuai Li, Mingshun Yang, Chengning Wang, Yang Zhang
2018 — conf
Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture.
ISPA/IUCC/BDCloud/SocialCom/SustainCom
Yang Zhang, Dan Feng, Zhipeng Tan, Jingning Liu, Wei Tong, Chengning Wang
2018 J jnl
CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System.
ACM Trans. Archit. Code Optim.
Yang Zhang, Dan Feng, Wei Tong, Yu Hua, Jingning Liu, Zhipeng Tan, Chengning Wang, Bing Wu, Zheng Li, Gaoxiang Xu
2017 A* conf
A Novel ReRAM-based Main Memory Structure for Optimizing Access Latency and Reliability.
DAC
Yang Zhang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Caihua Fang
2017 C conf
DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory.
ICCD
Chengning Wang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Yang Zhang