Yanan Sun - RankMe

67 papers A* 9A 5C 10Journal 28Unranked 15

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Heterogeneous CIM Architecture With Splittable Nonvolatile Computing-in-SRAM Cell Pairs Enabling Efficient On-Chip Neural Network Inference. IEEE Trans. Very Large Scale Integr. Syst. Dengfeng Wang, Liukai Xu, Yiming Chen, Weifeng He, Guanghui He, Xueqing Li, Yanan Sun
2026	J	`jnl`	DBP-CIM: Energy-Efficient 8T SRAM-Based Diagonal-Block Parallel Computing-in-Memory With Compact Data Layout for Arithmetic Operations. IEEE Trans. Very Large Scale Integr. Syst. Dengfeng Wang, Chengjun Chang, Weifeng He, Guanghui He, Yanan Sun
2026	J	`jnl`	DS2SC-Agent: A Multi-Agent Automated Pipeline for Rapid Chiplet Model Generation. CoRR Yiwei Wu, Yifan Wu, Yunhao Xiong, Dengwei Zhao, Jiaxuan Shen, Jianfei Jiang, Guanghui He, Shikui Tu, Yanan Sun
2026	J	`jnl`	Harmonia: Algorithm-Hardware Co-Design for Memory- and Compute-Efficient BFP-based LLM Inference. CoRR Xinyu Wang, Jieyu Li, Yanan Sun, Weifeng He
2026	J	`jnl`	PC2IM: An Efficient In-Memory Computing Accelerator for 3D Point Cloud. CoRR Dengfeng Wang, Shunqin Cai, Yanan Sun
2026	J	`jnl`	Signal integrity-aware multi-path design workflow for ultra-large-scale three-dimensional chips: A logic-on-memory stacking case study. Microelectron. J. Ang Li, Jianfei Jiang, Naifeng Jing, Yanan Sun, Zhigang Mao, Qin Wang
2025	A*	`conf`	BitPattern: Enabling Efficient Bit-Serial Acceleration of Deep Neural Networks through Bit-Pattern Pruning. DAC Gang Wang, Siqi Cai, Zhenyu Li, Wenjie Li, Dongxu Lyu, Yanan Sun, Jianfei Jiang, Guanghui He
2025	A*	`conf`	HPIM-NoC: A Priori-Knowledge-Based Optimization Framework for Heterogeneous PIM-Based NoCs. DAC Shuai Yuan, Angxin Cai, Qiushi Lin, Guoxing Wang, Yu Wang, Zhenhua Zhu, Yanan Sun
2025	J	`jnl`	Hop-CIM: An all-digital two-level approximate SRAM-CIM macro for high energy-efficient HNN acceleration with data-aware early exit and column-wise partial-sum reuse. Integr. Shunqin Cai, Liukai Xu, Wentao Liu, Dengfeng Wang, Keqing Ouyang, Jinyu Wang, Weizhong Wu, Qiang Huang, Zhi Li, Yanan Sun
2025	J	`jnl`	HyCTor: A Hybrid CNN-Transformer Network Accelerator With Flexible Weight/Output Stationary Dataflow and Multicore Extension. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shuai Yuan, Weifeng He, Zhenhua Zhu, Fangxin Liu, Zhuoran Song, Guohao Dai, Guanghui He, Yanan Sun
2025	A*	`conf`	KVO-LLM: Boosting Long-Context Generation Throughput for Batched LLM Inference. DAC Zhenyu Li, Dongxu Lyu, Gang Wang, Yuzhou Chen, Liyan Chen, Wenjie Li, Jianfei Jiang, Yanan Sun, Guanghui He
2025	J	`jnl`	Robust Monolithic 3D Carbon-Based Computing-in-SRAM With Variation-Aware Bit-Wise Data-Mapping for High-Performance and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. Dengfeng Wang, Weifeng He, Qin Wang, Hailong Jiao, Yanan Sun
2025	A*	`conf`	SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity. DAC Ruiyang Chen, Xueyuan Liu, Chunyu Qi, Yuanzheng Yao, Yanan Sun, Xiaoyao Liang, Zhuoran Song
2025	A*	`conf`	VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator. DAC Zhican Wang, Hongxiang Fan, Haroon Waris, Gang Wang, Zhenyu Li, Jianfei Jiang, Yanan Sun, Guanghui He
2025	J	`jnl`	VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator. CoRR Zhican Wang, Hongxiang Fan, Haroon Waris, Gang Wang, Zhenyu Li, Jianfei Jiang, Yanan Sun, Guanghui He
2024	J	`jnl`	A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip. IEEE J. Solid State Circuits Chuxiong Lin, Weifeng He, Yanan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok
2024	—	`conf`	An Energy-Efficient Logarithmic-Posit-Based In-SRAM Computing for Neural Network Acceleration. ICTA Chengjun Chang, Liukai Xu, Dengfeng Wang, Yanan Sun
2024	A*	`conf`	HEIRS: Hybrid Three-Dimension RRAM- and SRAM-CIM Architecture for Multi-task Transformer Acceleration. DAC Liukai Xu, Shuai Yuan, Dengfeng Wang, Yiming Chen, Xueqing Li, Yanan Sun
2024	J	`jnl`	VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations. IEEE Trans. Computers Chen Nie, Chenyu Tang, Jie Lin, Huan Hu, Chenyang Lv, Ting Cao, Weifeng Zhang, Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan Sun, Zhezhi He
2023	J	`jnl`	A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test Overhead. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok
2023	J	`jnl`	BC-MVLiM: A Binary-Compatible Multi-Valued Logic-in-Memory Based on Memristive Crossbars. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Zhi Li, Weiyi Liu, Weifeng He, Qin Wang, Zhigang Mao
2023	J	`jnl`	CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yuxuan Qin, Chuxiong Lin, Weifeng He, Yanan Sun, Zhigang Mao, Mingoo Seok
2023	J	`jnl`	CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Dengfeng Wang, Liukai Xu, Yiming Chen, Zhi Li, Songyuan Liu, Weifeng He, Yongpan Liu, Huazhong Yang, Xueqing Li
2023	A	`conf`	DeepTH: Chip Placement with Deep Reinforcement Learning Using a Three-Head Policy Network. DATE Dengwei Zhao, Shuai Yuan, Yanan Sun, Shikui Tu, Lei Xu
2023	—	`conf`	High Energy-Efficient Approximate In-SRAM Computing with Bit-Wise Compressor Configuration and Data-Aware Weight Remapping Method for Neural Network Acceleration. ICTA Shunqin Cai, Liukai Xu, Dengfeng Wang, Zhi Li, Liang Chang, Yanan Sun
2023	A	`conf`	TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations. ICCAD Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li, Yiming Chen, Weifeng He, Xueqing Li, Yanan Sun
2023	J	`jnl`	TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations. CoRR Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li, Yiming Chen, Weifeng He, Xueqing Li, Yanan Sun
2022	—	`conf`	All-Digital Full-Precision In-SRAM Computing with Reduction Tree for Energy-Efficient MAC Operations. ICTA Dengfeng Wanq, Zhi Li, Chengjun Chang, Weifeng He, Yanan Sun
2022	C	`conf`	An 8T/Cell FeFET-Based Nonvolatile SRAM with Improved Density and Sub-fJ Backup and Restore Energy. ISCAS Jianfeng Wang, Nuo Xiu, Juejian Wu, Yiming Chen, Yanan Sun, Huazhong Yang, Vijaykrishnan Narayanan, Sumitha George, Xueqing Li
2022	A*	`conf`	CREAM: computing in ReRAM-assisted energy and area-efficient SRAM for neural network acceleration. DAC Liukai Xu, Songyuan Liu, Zhi Li, Dengfeng Wang, Yiming Chen, Yanan Sun, Xueqing Li, Weifeng He, Shi Xu
2022	J	`jnl`	MSLM-RF: A Spatial Feature Enhanced Random Forest for On-Board Hyperspectral Image Classification. IEEE Trans. Geosci. Remote. Sens. Shuai Yuan, Yanan Sun, Weifeng He, Qianrong Gu, Shi Xu, Zhigang Mao, Shikui Tu
2022	A*	`conf`	Write or not: programming scheme optimization for RRAM-based neuromorphic computing. DAC Ziqi Meng, Yanan Sun, Weikang Qian
2021	—	`conf`	A Ternary Memristive Logic-in-Memory Design for Fast Data Scan. ICTA Tianhong Shen, Yanan Sun, Weifeng He, Zhi Li, Weiyi Liu, Zhezhi He, Li Jiang
2021	A	`conf`	An Area-Efficient Scannable In Situ Timing Error Detection Technique Featuring Low Test Overhead for Resilient Circuits. ICCAD Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok
2021	C	`conf`	An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits. ISCAS Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok
2021	C	`conf`	An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM. ISCAS Hao Zhang, Jieyu Li, Weifeng He, Yanan Sun, Mingoo Seok
2021	A*	`conf`	CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement. DAC Chuxiong Lin, Weifeng He, Yanan Sun, Zhigang Mao, Mingoo Seok
2021	—	`conf`	Can Emerging Computing Paradigms Help Enhancing Reliability Towards the End of Technology Roadmap? IRPS Runsheng Wang, Zuodong Zhang, Yawen Zhang, Yixuan Hu, Yanan Sun, Weikang Qian, Ru Huang
2021	C	`conf`	Design of Ternary Logic-in-Memory Based on Memristive Dual-Crossbars. ISCAS Weiyi Liu, Yanan Sun, Weifeng He, Qin Wang
2021	A	`conf`	Digital Offset for RRAM-based Neuromorphic Computing: A Novel Solution to Conquer Cycle-to-cycle Variation. DATE Ziqi Meng, Weikang Qian, Yilong Zhao, Yanan Sun, Rui Yang, Li Jiang
2021	J	`jnl`	ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhuoran Song, Yanan Sun, Lerong Chen, Tianjian Li, Naifeng Jing, Xiaoyao Liang, Li Jiang
2021	C	`conf`	Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process. ISCAS Jieyu Li, Zihan Lian, Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok
2021	J	`jnl`	MEDAC: A Metastability Condition Detection and Correction Technique for a Near-Threshold-Voltage Multi-Voltage-/Frequency-Domain Network-on-Chip. IEEE J. Solid State Circuits Chuxiong Lin, Weifeng He, Yanan Sun, Bingxi Pei, Pavan Kumar Chundi, Zhigang Mao, Mingoo Seok
2021	J	`jnl`	Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yanan Sun, Chang Ma, Zhi Li, Yilong Zhao, Jiachen Jiang, Weikang Qian, Rui Yang, Zhezhi He, Li Jiang
2020	—	`conf`	25.8 A Near- Threshold-Voltage Network-on-Chip with a Metastability Error Detection and Correction Technique for Supporting a Quad-Voltage/Frequency-Domain Ultra-Low-Power System-on-a-Chip. ISSCC Chuxiong Lin, Weifeng He, Yanan Sun, Bingxi Pei, Zhigang Mao, Mingoo Seok
2020	—	`conf`	ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. ACM Great Lakes Symposium on VLSI Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang, Li Jiang
2020	A	`conf`	Go Unary: A Novel Synapse Coding and Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing. DATE Chang Ma, Yanan Sun, Weikang Qian, Ziqi Meng, Rui Yang, Li Jiang
2020	J	`jnl`	Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2019	—	`conf`	A Novel Memristor-Reusable Mapping Methodology of In-memory Logic Implementation for High Area-Efficiency. NANOARCH Yongjie Lu, Yanan Sun, Weifeng He, Zhigang Mao
2019	—	`conf`	Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
2019	J	`jnl`	Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells. IEEE Trans. Circuits Syst. II Express Briefs Yanan Sun, Jiawei Gu, Weifeng He, Qin Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, Li Jiang
2019	—	`conf`	Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2018	C	`conf`	Electronic-Photonic Integrated Circuit Design and Crosstalk Modeling for a High Density Multi-Lane MZM Array. ISCAS Pengfei Ji, Jing Gao, Wenyi Xu, Yanan Sun, Weifeng He, Hui Wu
2018	J	`jnl`	Variation-Aware Global Placement for Improving Timing-Yield of Carbon-Nanotube Field Effect Transistor Circuit. ACM Trans. Design Autom. Electr. Syst. Chen Wang, Yanan Sun, Shiyan Hu, Li Jiang, Weikang Qian
2017	J	`jnl`	A 0.33 V 2.5 μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS. Integr. Wei Jin, Weifeng He, Jianfei Jiang, Haichao Huang, Xuejun Zhao, Yanan Sun, Xin Chen, Naifeng Jing
2017	—	`conf`	Low-power single-phase clocked redundant-transition-free flip-flop design with conditional charging scheme. ASICON Ling Chen, Yanan Sun, Weifeng He
2017	—	`conf`	Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
2017	J	`jnl`	Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
2016	—	`conf`	Enabling in-situ logic-in-memory capability using resistive-RAM crossbar memory. FPT Naifeng Jing, Taozhong Li, Zhongyuan Zhao, Wei Jin, Yanan Sun, Weifeng He, Zhigang Mao
2015	J	`jnl`	A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. Yanan Sun, Hailong Jiao, Volkan Kursun
2015	C	`conf`	Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS Yanan Sun, Volkan Kursun
2014	J	`jnl`	Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Volkan Kursun
2014	—	`conf`	Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM Yanan Sun, Hailong Jiao, Volkan Kursun
2013	C	`conf`	Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS Yanan Sun, Volkan Kursun
2012	—	`conf`	NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC Yanan Sun, Volkan Kursun
2011	C	`conf`	Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS Yanan Sun, Volkan Kursun
2011	C	`conf`	Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC Yanan Sun, Volkan Kursun