Yan Wang - RankMe

97 papers A* 3A 4B 2C 15Journal 34Unranked 39

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A 14GHz Chopper-Refolding Sampling PLL Achieving 33.8$\text{fs}_{\text{rms}}$ and 80.8dBc Reference Spur with a kT/C-Noise-Cancellation SPD. ISSCC Yichen Liu, Jian Zhang, Xiaosen Liu, Yan Wang
2026	J	`jnl`	Fast Yield Analysis and Optimization Based on Sensitivity and Orthogonal Sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xingyu Tang, Wenfei Hu, Zhikai Wang, Xiaosen Liu, Yan Wang
2025	—	`conf`	3D-IC Chiplet Integrated Power Supply with LDO, SCVR, and Buck DC-DC Converter. CICC Xiaosen Liu, Xichen Sun, Haozhe Zhang, Yan Wang
2025	J	`jnl`	A Broadband Bidirectional Four-Element Four-Beam Beamformer With Compact Floorplan in a 65nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Jian Zhang, Ming Zhai, Yichen Liu, Xiangjie Yi, Dawei Wang, Wei Zhu, Yan Wang
2024	—	`conf`	32.4 A 67.8-to-108.2GHz Power Amplifier with a Three-Coupled-Line-Based Complementary-Gain-Boosting Technique Achieving 442GHz GBW and 23.1% peak PAE. ISSCC Weiping Wu, Xun Bao, Shulan Chen, Yan Wang, Lei Zhang
2024	—	`conf`	32.8 A 27.8-to-38.7GHz Load-Modulated Balanced Power Amplifier with Scalable 7-to-1 Load-Modulated Power-Combine Network Achieving 27.2dBm Output Power and 28.8%/23.2%/16.3%/11.9% Peak/6/9/12dB Back-Off Efficiency. ISSCC Wei Zhu, Jiazhi Ying, Long Chen, Jian Zhang, Guanshen Lv, Xiangjie Yi, Zhiqiang Zhao, Zunxiang Wang, Yan Wang, Wenhua Chen, Houjun Sun
2024	—	`conf`	A 92%-Efficiency 0.828μs Settling Time FC5L Voltage Regulator Featuring Time-Domain Charge Balancing & Flying Capacitor Self-Switching for Wide Dynamic Range & Fast Transient Chiplet Applications. CICC Xichen Sun, Jingshu Yu, Xuliang Wang, Jin Wei, Junmin Jiang, Chenchang Zhan, Yan Wang, Xiaosen Liu
2024	J	`jnl`	A Broadband Variable-Gain Low-Noise Amplifier With Low NF and Dual Phase Compensation. IEEE Trans. Circuits Syst. II Express Briefs Ruitao Wang, Chenguang Li, Yan Wang
2024	C	`conf`	A Two-step Fine-tuning Assisted Layout Sizing Scheme for Analog/RF Circuits. ISCAS Zhikai Wang, Zuochang Ye, Jingbo Zhou, Xiaosen Liu, Yan Wang
2024	J	`jnl`	An Adaptive Analog Temperature Compensated W-Band Front-End With ±0.0033 dB/°C Gain Variation Across -30 °C to 120 °C. IEEE Trans. Circuits Syst. II Express Briefs Ruitao Wang, Wei Zhu, Yan Wang
2024	B	`conf`	An Efficient Transfer Learning Assisted Global Optimization Scheme for Analog/RF Circuits. ASPDAC Zhikai Wang, Jingbo Zhou, Xiaosen Liu, Yan Wang
2024	J	`jnl`	Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang
2023	C	`conf`	A Fully Integrated W-Band Four-Channel Silicon-Based Radiometer Array in 65-nm CMOS. ISCAS Shi Chen, Qi Zhao, Lei Zhang, Yan Wang
2023	—	`conf`	A Hybrid Integrated W-Band 4-Element Phased-Array Transceiver Front-End Achieving 21.6% Full TX Peak PAE at 14.8dBm Output Power and <1°/dB Phase/Gain Resolution in 65-nm CMOS Technology. A-SSCC Wei Zhu, Jian Zhang, Jiazhi Ying, Xiangjie Yi, Yan Wang, Houjun Sun
2023	—	`conf`	A Ka-Band Mutual Coupling Resilient Balanced PA with Magnetic Coupling Self-Cancelling Inductor Achieving 21.2dBm OP1dBand 27.6% PAE1dB. A-SSCC Jian Zhang, Wei Zhu, Dawei Wang, Xiangjie Yi, Ruitao Wang, Yan Wang
2023	—	`conf`	A V-Band Compact LNA With Gm-Boosting and Noise-Cancelling Technique. NEWCAS Jingze Wang, Shulan Chen, Lei Zhang, Yan Wang
2023	—	`conf`	An Ultra-Wideband Amplifier With Compact Magnetically Coupled Feedback Gain Cell. NEWCAS Weiping Wu, Shi Chen, Xun Bao, Lei Zhang, Yan Wang
2023	—	`conf`	DC-Model: A New Method for Assisting the Analog Circuit Optimization. ISQED Yuan Wang, Jian Xin, Haixu Liu, Qian Qin, Chenkai Chai, Yukai Lu, Jinglei Hao, Jianhao Xiao, Zuochang Ye, Yan Wang
2023	J	`jnl`	Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang
2022	—	`conf`	A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process. ISSCC Wei Zhu, Jiawen Wang, Ruitao Wang, Jian Zhang, Chenguang Li, Sen Yin, Yan Wang
2022	—	`conf`	A Packaged 90-to-96GHz 16-Element Phased Array with 18.8/15.8dBm Psat/OP1dB, 14.8% TX PAE in 65nm CMOS Process and +51dBm Array EIRP. VLSI Technology and Circuits Wei Zhu, Jian Zhang, Jiawen Wang, Ruitao Wang, Chenguang Li, Kai Wang, Yan Wang
2022	—	`conf`	An Efficient Kriging-based Constrained Multi-objective Evolutionary Algorithm for Analog Circuit Synthesis via Self-adaptive Incremental Learning. ASP-DAC Sen Yin, Wenfei Hu, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Yan Wang
2022	—	`conf`	An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology. VLSI Technology and Circuits Wei Zhu, Ruitao Wang, Jian Zhang, Jiawen Wang, Chenguang Li, Yan Wang
2022	J	`jnl`	Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing. IEEE Trans. Circuits Syst. II Express Briefs Sen Yin, Ruitao Wang, Jian Zhang, Yan Wang
2022	—	`conf`	Building Post-layout Performance Model of Analog/RF Circuits by Fine-tuning Technique. ISQED Zhikai Wang, Wenfei Hu, Jingbo Zhou, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Dejing Dou, Zuochang Ye, Yan Wang
2021	—	`conf`	14.5 A 1V W-Band Bidirectional Transceiver Front-End with <1dB T/R Switch Loss, <1°/dB Phase/Gain Resolution and 12.3% TX PAE at 15.1dBm Output Power in 65nm CMOS Technology. ISSCC Wei Zhu, Jiawen Wang, Ruitao Wang, Yan Wang
2021	C	`conf`	A 2.8 nV/√ Hz Chopper Amplifier for Bridge Readout with Dual Ripple Reduction and Noise- Nonlinearity -Cancelling Loop. ISCAS Huapin Chen, Lei Zhang, Yan Wang
2021	J	`jnl`	A 76-81-GHz Four-Channel Digitally Controlled CMOS Receiver for Automotive Radars. IEEE Trans. Circuits Syst. I Regul. Pap. Dongfang Pan, Zongming Duan, Bowen Wu, Yan Wang, Dong Huang, Yan Wang, Liguo Sun, Ping Gui, Lin Cheng
2021	—	`conf`	A Dual-Mode 24-32 GHz 4-Element Phased-Array Transceiver Front-End with SSA Beamformer for Autonomous Agile Unknown Signal Tracking and Blocker Rejection within <0.1 us and 21.3%/15% Transmitter Peak/OP1dB PAE. CICC Wei Zhu, Jiawen Wang, Ruitao Wang, Yan Wang
2021	C	`conf`	A K-Band Fractional-N PLL with Low-Spur Low-Power Linearization Circuit and PVT Robust Spur Trapper. ISCAS Zexin Yuan, Lei Zhang, Yan Wang
2021	—	`conf`	An Ultra-Compact 84.9-107GHz LNA with 4.9dB NF by Utilizing Coupled-line-based Gm-Boosting and Noise-Canceling Techniques in 65-nm CMOS Technology. CICC Wei Zhu, Jiawen Wang, Ruitao Wang, Yan Wang
2021	—	`conf`	An efficient optimization method of RF passive components using RBF model. ASICON Sen Yin, Wenfei Hu, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Yan Wang
2021	—	`conf`	Design and Optimization of N-type SiC Gate Turn-off Thyristor with High Turn-off Gain and High Breakdown Voltage. ICICDT Hongming Ma, Yan Wang
2021	C	`conf`	Dynamic Gesture Recognition Based on RF Sensor and AE-LSTM Neural Network. ISCAS Bo Zhang, Lei Zhang, Mojun Wu, Yan Wang
2021	—	`conf`	Large-scale Integrated Circuits Simulation Based on CNT-FET Model. ICICDT Zhikai Wang, Wenfei Hu, Ziyu Gu, Wenyuan Zhang, Sen Yin, Ruitao Wang, Jian Zhang, Yan Wang
2021	A*	`conf`	Sensitivity Importance Sampling Yield Analysis and Optimization for High Sigma Failure Rate Estimation. DAC Wenfei Hu, Zhikai Wang, Sen Yin, Zuochang Ye, Yan Wang
2021	—	`conf`	Si MPS with CIBH Structure for Fast Recovery Applications. ICICDT Hongming Ma, Yan Wang
2021	—	`conf`	Using Auto-Encoder Neural Networks for Memory Fault Tolerance in Gesture Recognition System. ICMAI Bo Zhang, Lei Zhang, Mojun Wu, Yan Wang
2020	C	`conf`	A 20-Gb/s CMOS Cross-Coupled Dual-Feedback Loop Transimpedance Amplifier. ISCAS Weiping Wu, Lei Zhang, Yan Wang
2020	A*	`conf`	Adjoint Transient Sensitivity Analysis for Objective Functions Associated to Many Time Points. DAC Wenfei Hu, Zuochang Ye, Yan Wang
2020	—	`conf`	An End-to-end System for Pests and Diseases Identification. IVSP Ning Zhang, Zuochang Ye, Yan Wang
2020	B	`conf`	Object Detection with Extended Attention and Spatial Information. IJCNN Yingda Guan, Zuochang Ye, Yan Wang
2019	—	`conf`	A Damage Identification System Based on Deep Learning. ICIT Yao Wu, Zuochang Ye, Yan Wang
2019	C	`conf`	A Digitally Controlled CMOS Receiver with -14 dBm P1dB for 77 GHz Automotive Radar. ISCAS Dongfang Pan, Zongming Duan, Bowen Wu, Yan Wang, Dong Huang, Yan Wang, Ping Gui, Liguo Sun
2019	J	`jnl`	A Monolithic Dual-Band 77/94 GHz Transceiver Front-End With Shared Frequency Multiplier. IEEE Access Liang Chen, Lei Zhang, Yan Wang
2019	J	`jnl`	A PVT-Robust Analog Baseband With DC Offset Cancellation for FMCW Automotive Radar. IEEE Access Weiping Wu, Lei Zhang, Yan Wang
2019	—	`conf`	DNFIT Based Curve Fitting And Prediction In Semiconductor Modeling And Simulation. ICICDT Wenfei Hu, Dongsheng Ma, Miao Li, Zhijian Pan, Zuochang Ye, Yan Wang
2018	J	`jnl`	6 Gbps 16QAM fully integrated receiver using optimized neutralization technique LNA in 90 nm CMOS. Sci. China Inf. Sci. Di Li, Lei Zhang, Yan Wang
2018	C	`conf`	An Accurate dB-Linear Programmable-Gain Amplifier with Temperature-Robust Characteristic. ISCAS Weiping Wu, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2018	J	`jnl`	Design of mm-wave amplifiers based on over & under neutralization techniques. Sci. China Inf. Sci. Di Li, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2018	—	`conf`	GLNet for Target Detection in Millimeter Wave Images. ICMIP Sheng Wang, Zuochang Ye, Yan Wang
2018	A	`conf`	Low-cost high-accuracy variation characterization for nanoscale IC technologies via novel learning-based techniques. DATE Zhijian Pan, Miao Li, Jian Yao, Hong Lu, Zuochang Ye, Yanfeng Li, Yan Wang
2018	—	`conf`	Parametric Circuit Optimization with Reinforcement Learning. ISVLSI Changcheng Tang, Zuochang Ye, Yan Wang
2018	J	`jnl`	Study on scalability of hybrid junctionless FinFET and multi-stacked nanowire FET by TCAD simulation. IEICE Electron. Express ChengKuei Lee, Sen Yin, Jinyu Zhang, Yan Wang, Zhiping Yu
2018	J	`jnl`	Wideband Inductorless Low-Power LNAs with G IEEE Trans. Circuits Syst. I Regul. Pap. Zhijian Pan, Chuan Qin, Zuochang Ye, Yan Wang, Zhiping Yu
2017	J	`jnl`	A 5.8 GHz class-AB power amplifier with 25.4 dBm saturation power and 29.7% PAE. Sci. China Inf. Sci. Chuan Qin, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2017	J	`jnl`	A 60-GHz 360° 5-Bit Phase Shifter With Constant IL Compensation Followed by a Normal Amplifier With ±1 dB Gain Variation and 0.6-dBm OP IEEE Trans. Circuits Syst. II Express Briefs Dong Huang, Lei Zhang, Di Li, Li Zhang, Yan Wang, Zhiping Yu
2017	J	`jnl`	Dual AC Boosting Compensation Scheme for Multistage Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs Chuan Qin, Lei Zhang, Chunyuan Zhou, Li Zhang, Yan Wang, Zhiping Yu
2016	C	`conf`	A 3.1-4.2 GHz automatic amplitude control loop VCO with constant Kvco and <10mV amplitude variation. ISCAS Dongyang Yan, Lei Zhang, Li Zhang, Yan Wang
2016	J	`jnl`	A fully integrated CMOS 60-GHz transceiver for IEEE802.11ad applications. J. Commun. Inf. Networks Lei Zhang, Jun Luo, Wei Zhu, Li Zhang, Yan Wang, Zhiping Yu
2016	J	`jnl`	A new Multi-Dose Method for extracting source/drain series resistances of halo-doped MOSFETs. IEICE Electron. Express Zebang Guo, Zuochang Ye, Xuejie Shi, Yan Wang
2016	—	`conf`	Fast HEVC CU/PU mode decision based on ANN and texture analysis. IPTA Shuaihu Zhou, Zuochang Ye, Yan Wang
2015	C	`conf`	A 24GHz low power and low phase noise PLL frequency synthesizer with constant KVCO for 60GHz wireless applications. ISCAS Jun Luo, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2015	C	`conf`	A 64dB gain 60GHz receiver with 7.1dB noise figure for 802.11ad applications in 90nm CMOS. ISCAS Jun Luo, Lei Zhang, Wei Zhu, Li Zhang, Yan Wang, Zhiping Yu
2015	J	`jnl`	A Highly-Scalable Analog Equalizer Using a Tunable and Current-Reusable for 10-Gb/s I/O Links. IEEE Trans. Very Large Scale Integr. Syst. Yong Chen, Pui-In Mak, Yan Wang
2015	J	`jnl`	An Efficient SRAM Yield Analysis and Optimization Method With Adaptive Online Surrogate Modeling. IEEE Trans. Very Large Scale Integr. Syst. Jian Yao, Zuochang Ye, Yan Wang
2015	—	`conf`	Automatic design for analog/RF front-end system in 802.11ac receiver. ASP-DAC Zhijian Pan, Chuan Qin, Zuochang Ye, Yan Wang
2015	J	`jnl`	Behavioral Analysis and Optimization of CMOS CML Dividers for Millimeter-Wave Applications. IEEE Trans. Circuits Syst. II Express Briefs Jun Luo, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2015	J	`jnl`	Characterizing and optimizing human anticancer drug targets based on topological properties in the context of biological pathways. J. Biomed. Informatics Jian Zhang, Yan Wang, Desi Shang, Fulong Yu, Wei Liu, Yan Zhang, Chenchen Feng, Qiuyu Wang, Yanjun Xu, Yuejuan Liu, Xuefeng Bai, Xuecang Li, Chunquan Li
2014	—	`conf`	A 3.45-4.22 GHz PLL frequency synthesizer with constant loop bandwidth for WLAN applications. MWSCAS Xiaolong Liu, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2014	A	`conf`	Efficient high-sigma yield analysis for high dimensional problems. DATE Moning Zhang, Zuochang Ye, Yan Wang
2014	J	`jnl`	Fast Convolution Method and Its Application in Mask Optimization for Intensity Calculation Using Basis Expansion. IEEE Trans. Image Process. Yaping Sun, Jinyu Zhang, Yan Wang, Zhiping Yu
2014	J	`jnl`	Importance Boundary Sampling for SRAM Yield Analysis With Multiple Failure Regions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jian Yao, Zuochang Ye, Yan Wang
2014	J	`jnl`	Scalable Compact Modeling for On-Chip Passive Elements with Correlated Parameter Extraction and Adaptive Boundary Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jian Yao, Zuochang Ye, Yan Wang
2013	J	`jnl`	A Fifth-Order 20-MHz Transistorized-LC-Ladder LPF With 58.2-dB SFDR, 68-µW/Pole/MHz Efficiency, and 0.13-mm IEEE Trans. Circuits Syst. II Express Briefs Yong Chen, Pui-In Mak, Li Zhang, He Qian, Yan Wang
2013	J	`jnl`	A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm IEEE Trans. Circuits Syst. II Express Briefs Yong Chen, Pui-In Mak, Stefano D'Amico, Li Zhang, He Qian, Yan Wang
2013	C	`conf`	An inductorless wideband low noise amplifier with current reuse and linearity enhancement. ISCAS Chuan Qin, Lei Zhang, Yan Wang, Zhiping Yu, Dajie Zeng
2013	A	`conf`	Efficient importance sampling for high-sigma yield analysis with adaptive online surrogate modeling. DATE Jian Yao, Zuochang Ye, Yan Wang
2012	C	`conf`	A transformer-based filtering technique to lower LC-oscillator phase noise. ISCAS Qing Jin, Kaiyuan Yang, Chunyuan Zhou, Dongxu Yang, Lei Zhang, Yan Wang, Zhiping Yu, Weidong Geng
2012	—	`conf`	A unified model and direct extraction methodologies of various CPWs for CMOS mm-wave applications. CICC Jun Luo, Lei Zhang, Yan Wang
2012	J	`jnl`	Efficient Full-Chip Statistical Leakage Analysis Based on Fast Matrix Vector Product. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu
2011	—	`conf`	A fully integrated CMOS nanoscale biosensor microarray. CICC Lei Zhang, Xiangqing He, Yan Wang, Zhiping Yu
2011	C	`conf`	A low-power ESD-protected 24GHz receiver front-end with π-type input matching network. ISCAS Hongrui Wang, Chao Jiao, Li Zhang, Dajie Zeng, Dongxu Yang, Yan Wang, Zhiping Yu
2011	—	`conf`	Broadband compact model for on-chip mm-wave transformers and baluns with emphasis on capacitive coupling effects. CICC Yang Tang, Zuochang Ye, Yan Wang
2011	J	`jnl`	Design of 24-GHz High-Gain Receiver Front-End Utilizing ESD-Split Input Matching Network. IEEE Trans. Circuits Syst. II Express Briefs Hongrui Wang, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu
2011	J	`jnl`	Gradient-Based Source and Mask Optimization in Optical Lithography. IEEE Trans. Image Process. Yao Peng, Jinyu Zhang, Yan Wang, Zhiping Yu
2011	J	`jnl`	Injection-Locking-Based Power and Speed Optimization of CML Dividers. IEEE Trans. Circuits Syst. II Express Briefs Chunyuan Zhou, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu, He Qian
2011	—	`conf`	Robust spatial correlation extraction with limited sample via L1-norm penalty. ASP-DAC Mingzhi Gao, Zuochang Ye, Dajie Zeng, Yan Wang, Zhiping Yu
2011	C	`conf`	Understanding dynamic behavior of mm-wave CML divider with injection-locking concept. ISCAS Hongrui Wang, Dajie Zeng, Dongxu Yang, Li Zhang, Lei Zhang, Yan Wang, He Qian, Zhiping Yu
2010	—	`conf`	A comprehensive model for gate delay under process variation and different driving and loading conditions. ISQED Mingzhi Gao, Zuochang Ye, Yao Peng, Yan Wang, Zhiping Yu
2010	—	`conf`	A novel equivalent circuit for on chip transmission lines modeling. CICC Dajie Zeng, Hongrui Wang, Dongxu Yang, Li Zhang, Yan Wang, Zhiping Yu, Yaohui Zhang
2010	—	`conf`	A robust pixel-based RET optimization algorithm independent of initial conditions. ASP-DAC Jinyu Zhang, Wei Xiong, Yan Wang, Zhiping Yu, Min-Chun Tsai
2010	A*	`conf`	Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis. DAC Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu
2010	—	`conf`	High performance source optimization using a gradient-based method in optical lithography. ISQED Yao Peng, Jinyu Zhang, Yan Wang, Zhiping Yu
2009	J	`jnl`	Analog circuit optimization system based on hybrid evolutionary algorithms. Integr. Bo Liu, Yan Wang, Zhiping Yu, Leibo Liu, Miao Li, Zheng Wang, Jing Lu, Francisco V. Fernández
2008	A	`conf`	A highly efficient optimization algorithm for pixel manipulation in inverse lithography technique. ICCAD Jinyu Zhang, Wei Xiong, Yan Wang, Zhiping Yu, Min-Chun Tsai
2008	J	`jnl`	An effective parameter extraction method based on memetic differential evolution algorithm. Microelectron. J. Bo Liu, Jing Lu, Yan Wang, Yang Tang