Yakun Sophia Shao

75 papers A* 16A 5B 4C 2Misc 1Journal 34Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	3DGS CoRR Roger Hsiao, Yuchen Fang, Xiangru Huang, Ruilong Li, Hesam Rabeti, Zan Gojcic, Javad Lavaei, James Demmel, Yakun Sophia Shao
2026	J	`jnl`	MAVERIC: A Heterogeneous Robotics SoC With 4 CPU Cores and 13 INT8/FP32 Accelerators in 16-nm-Class Technology. IEEE J. Solid State Circuits Seah Kim, Jerry Zhao, Roger Hsiao, Yufeng Chi, Vighnesh Iyer, Vikram Jain, Borivoje Nikolic, Yakun Sophia Shao
2025	J	`jnl`	Autocomp: LLM-Driven Code Optimization for Tensor Accelerators. CoRR Charles Hong, Sahil Bhatia, Alvin Cheung, Yakun Sophia Shao
2025	—	`conf`	Characterizing and Optimizing Real-Time Optimal Control for Embedded SoCs. IISWC Shengjun Kris Dong, Dima Nikiforov, Widyadewi Soedarmadji, Minh Nguyen, Vikram Jain, Christopher W. Fletcher, Yakun Sophia Shao
2025	J	`jnl`	DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. CoRR Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
2025	J	`jnl`	Demonstrating Berkeley Humanoid Lite: An Open-source, Accessible, and Customizable 3D-printed Humanoid Robot. CoRR Yufeng Chi, Qiayuan Liao, Junfeng Long, Xiaoyu Huang, Yakun Sophia Shao, Borivoje Nikolic, Zhongyu Li, Koushil Sreenath
2025	J	`jnl`	ETS: Efficient Tree Search for Inference-Time Scaling. CoRR Coleman Hooper, Sehoon Kim, Suhong Moon, Kerem Dilmen, Monishwaran Maheswaran, Nicholas Lee, Michael W. Mahoney, Yakun Sophia Shao, Kurt Keutzer, Amir Gholami
2025	J	`jnl`	Ego-Vision World Model for Humanoid Contact Planning. CoRR Hang Liu, Yuman Gao, Sangli Teng, Yufeng Chi, Yakun Sophia Shao, Zhongyu Li, Maani Ghaffari, Koushil Sreenath
2025	J	`jnl`	FGMP: Fine-Grained Mixed-Precision Weight and Activation Quantization for Hardware-Accelerated LLM Inference. CoRR Coleman Hooper, Charbel Sakr, Ben Keller, Rangharajan Venkatesan, Kurt Keutzer, Yakun Sophia Shao, Brucek Khailany
2025	J	`jnl`	LangWBC: Language-directed Humanoid Whole-Body Control via End-to-end Learning. CoRR Yiyang Shao, Xiaoyu Huang, Bike Zhang, Qiayuan Liao, Yuman Gao, Yufeng Chi, Zhongyu Li, Yakun Sophia Shao, Koushil Sreenath
2025	J	`jnl`	Multipole Attention for Efficient Long Context Reasoning. CoRR Coleman Hooper, Sebastian Zhao, Luca Manolache, Sehoon Kim, Michael W. Mahoney, Yakun Sophia Shao, Kurt Keutzer, Amir Gholami
2025	—	`conf`	SuperNoVA: Algorithm-Hardware Co-Design for Resource-Aware SLAM. ASPLOS (1) Seah Kim, Roger Hsiao, Borivoje Nikolic, James Demmel, Yakun Sophia Shao
2025	—	`conf`	Virgo: Cluster-level Matrix Unit Integration in GPUs for Scalability and Energy Efficiency. ASPLOS (2) Hansung Kim, Ruohan Richard Yan, Joshua You, Tieliang Vamber Yang, Yakun Sophia Shao
2025	—	`conf`	XRSight: An End-to-End Hardware-Software Co-Design Platform for XR SoC Evaluation. IISWC Prashanth Ganesh, Zekai Lin, Yakun Sophia Shao
2025	—	`conf`	hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation. MLCAD Charles Hong, Brendan Roberts, Huijae An, Alex Um, Advay Ratan, Yakun Sophia Shao
2025	J	`jnl`	hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation. CoRR Charles Hong, Brendan Roberts, Huijae An, Alex Um, Advay Ratan, Yakun Sophia Shao
2024	J	`jnl`	AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration. IEEE Micro Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2024	A	`conf`	Design Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems. ISLPED Vikram Jain, Wei Tang, Zuoguo Wu, Viansa Schmulbach, Yakun Sophia Shao, Zhengya Zhang, Borivoje Nikolic
2024	Misc	`conf`	DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets. CoRL Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
2024	J	`jnl`	DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets. CoRR Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
2024	A*	`conf`	FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. ISCA Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
2024	A*	`conf`	KVQuant: Towards 10 Million Context Length LLM Inference with KV Cache Quantization. NeurIPS Coleman Hooper, Sehoon Kim, Hiva Mohammadzadeh, Michael W. Mahoney, Yakun Sophia Shao, Kurt Keutzer, Amir Gholami
2024	J	`jnl`	KVQuant: Towards 10 Million Context Length LLM Inference with KV Cache Quantization. CoRR Coleman Hooper, Sehoon Kim, Hiva Mohammadzadeh, Michael W. Mahoney, Yakun Sophia Shao, Kurt Keutzer, Amir Gholami
2024	J	`jnl`	LLM-Aided Compilation for Tensor Accelerators. CoRR Charles Hong, Sahil Bhatia, Altan Haan, Shengjun Kris Dong, Dima Nikiforov, Alvin Cheung, Yakun Sophia Shao
2024	—	`conf`	Next-Generation Domain-Specific Accelerators: From Hardware to System. CICC Yakun Sophia Shao
2024	A*	`conf`	Stellar: An Automated Design Framework for Dense and Sparse Spatial Accelerators. MICRO Hasan Nazim Genc, Hansung Kim, Prashanth Ganesh, Yakun Sophia Shao
2024	J	`jnl`	Virgo: Cluster-level Matrix Unit Integration in GPUs for Scalability and Energy Efficiency. CoRR Hansung Kim, Ruohan Yan, Joshua You, Tieliang Vamber Yang, Yakun Sophia Shao
2023	A*	`conf`	AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads. MICRO Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023	J	`jnl`	Code Transpilation for Hardware Accelerators. CoRR Yuto Nishida, Sahil Bhatia, Shadaj Laddad, Hasan Genc, Yakun Sophia Shao, Alvin Cheung
2023	A*	`conf`	DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. MICRO Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
2023	J	`jnl`	Full Stack Optimization of Transformer Inference: a Survey. CoRR Sehoon Kim, Coleman Hooper, Thanakul Wattanawong, Minwoo Kang, Ruohan Yan, Hasan Genc, Grace Dinh, Qijing Huang, Kurt Keutzer, Michael W. Mahoney, Yakun Sophia Shao, Amir Gholami
2023	J	`jnl`	Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits Masum Hossain, Arijit Raychowdhury, Sanu K. Mathew, Yakun Sophia Shao, Yih Wang
2023	A*	`conf`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. HPCA Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	J	`jnl`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. CoRR Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	RoSÉ: A Hardware-Software Co-Simulation Infrastructure Enabling Pre-Silicon Full-Stack Robotics SoC Evaluation. ISCA Dima Nikiforov, Shengjun Chris Dong, Chengyi Lux Zhang, Seah Kim, Borivoje Nikolic, Yakun Sophia Shao
2023	J	`jnl`	SPEED: Speculative Pipelined Execution for Efficient Decoding. CoRR Coleman Hooper, Sehoon Kim, Hiva Mohammadzadeh, Hasan Genc, Kurt Keutzer, Amir Gholami, Yakun Sophia Shao
2022	J	`jnl`	Efficient emotion recognition using hyperdimensional computing with combinatorial channel encoding and cellular automata. Brain Informatics Alisha Menon, Anirudh Natarajan, Reva Agashe, Daniel Sun, Melvin Aristio, Harrison Liew, Yakun Sophia Shao, Jan M. Rabaey
2022	B	`conf`	Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. ISPASS Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao
2021	—	`conf`	A 16mm ESSCIRC Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2021	A*	`conf`	CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. ISCA Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao
2021	J	`jnl`	CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. CoRR Qijing Huang, Minwoo Kang, Grace Dinh, Thomas Norell, Aravind Kalaiah, James Demmel, John Wawrzynek, Yakun Sophia Shao
2021	J	`jnl`	Efficient emotion recognition using hyperdimensional computing with combinatorial channel encoding and cellular automata. CoRR Alisha Menon, Anirudh Natarajan, Reva Agashe, Daniel Sun, Melvin Aristio, Harrison Liew, Yakun Sophia Shao, Jan M. Rabaey
2021	A*	`conf`	Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2021	B	`conf`	Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms. ISPASS Jingyi Xu, Sehoon Kim, Borivoje Nikolic, Yakun Sophia Shao
2021	J	`jnl`	SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference. IEEE J. Solid State Circuits Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
2021	J	`jnl`	Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2021	C	`conf`	Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs. ISCAS Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
2020	J	`jnl`	A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2020	J	`jnl`	Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2020	J	`jnl`	Commercial Products. IEEE Micro David A. Patterson, Yakun Sophia Shao
2020	A*	`conf`	Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
2020	A	`conf`	NeuroVectorizer: end-to-end vectorization with deep reinforcement learning. CGO Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
2019	—	`conf`	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	—	`conf`	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
2019	A*	`conf`	Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration. ASPLOS Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer
2019	J	`jnl`	Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic
2019	A	`conf`	MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
2019	J	`jnl`	NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. CoRR Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
2019	—	`conf`	SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS. VLSI Circuits Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
2019	A*	`conf`	Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
2019	B	`conf`	Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer
2018	A*	`conf`	A modular digital VLSI flow for high-productivity SoC design. DAC Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer
2018	J	`jnl`	Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis. IEEE Trans. Circuits Syst. II Express Briefs Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2018	J	`jnl`	Hardware Acceleration. IEEE Micro Martha A. Kim, Yakun Sophia Shao
2017	—	`conf`	Methods and infrastructure in the era of accelerator-centric architectures. MWSCAS Brandon Reagen, Yakun Sophia Shao, Sam Likun Xi, Gu-Yeon Wei, David Brooks
2017	C	`conf`	Using dynamic dependence analysis to improve the quality of high-level synthesis designs. ISCAS Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2016	A*	`conf`	Co-designing accelerators and SoC interfaces using gem5-Aladdin. MICRO Yakun Sophia Shao, Sam Likun Xi, Vijayalakshmi Srinivasan, Gu-Yeon Wei, David M. Brooks
2015	—	`book`	Research Infrastructures for Hardware Accelerators Yakun Sophia Shao, David M. Brooks
2015	J	`jnl`	The Aladdin Approach to Accelerator Design and Modeling. IEEE Micro Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2014	A*	`conf`	Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architectures. ISCA Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
2014	—	`conf`	MachSuite: Benchmarks for accelerator design and customized architectures. IISWC Brandon Reagen, Robert Adolf, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
2013	A	`conf`	Energy characterization and instruction-level energy model of Intel's Xeon Phi processor. ISLPED Yakun Sophia Shao, David M. Brooks
2013	B	`conf`	ISA-independent workload characterization and its implications for specialized architectures. ISPASS Yakun Sophia Shao, David M. Brooks
2013	A	`conf`	Quantifying acceleration: Power/performance trade-offs of application kernels in hardware. ISLPED Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks