Yahya Can Tugrul

33 papers A* 8A 2B 1Journal 21Unranked 1

Year	Rank	Type	Title / Venue / Authors
2025	A*	`conf`	Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. HPCA Yahya Can Tugrul, A. Giray Yaglikçi, Ismail Emir Yüksel, Ataberk Olgun, Oguzhan Canpolat, Nisa Bostanci, Mohammad Sadrosadati, Oguz Ergin, Onur Mutlu
2025	J	`jnl`	Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. CoRR Yahya Can Tugrul, A. Giray Yaglikçi, Ismail Emir Yüksel, Ataberk Olgun, Oguzhan Canpolat, Nisa Bostanci, Mohammad Sadrosadati, Oguz Ergin, Onur Mutlu
2024	A*	`conf`	ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation. USENIX Security Symposium Ataberk Olgun, Yahya Can Tugrul, Nisa Bostanci, Ismail Emir Yuksel, Haocong Luo, Steve Rhyner, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Onur Mutlu
2024	A*	`conf`	BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads. MICRO Oguzhan Canpolat, A. Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yuksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu
2024	A*	`conf`	CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost. HPCA F. Nisa Bostanci, Ismail Emir Yüksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, A. Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost. CoRR F. Nisa Bostanci, Ismail Emir Yuksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, Abdullah Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu
2024	A*	`conf`	Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis. HPCA Ismail Emir Yüksel, Yahya Can Tugrul, Ataberk Olgun, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis. CoRR Ismail Emir Yuksel, Yahya Can Tugrul, Ataberk Olgun, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations. CoRR Oguzhan Canpolat, Abdullah Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yüksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu
2024	J	`jnl`	Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator. IEEE Comput. Archit. Lett. Haocong Luo, Yahya Can Tugrul, F. Nisa Bostanci, Ataberk Olgun, Abdullah Giray Yaglikçi, Onur Mutlu
2024	A	`conf`	Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips. DSN Ataberk Olgun, Majd Osseiran, A. Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu
2024	J	`jnl`	RowPress Vulnerability in Modern DRAM Chips. CoRR Haocong Luo, Ataberk Olgun, A. Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	RowPress Vulnerability in Modern DRAM Chips. IEEE Micro Haocong Luo, Ataberk Olgun, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture. ACM Trans. Archit. Code Optim. Ataberk Olgun, F. Nisa Bostanci, Geraldo Francisco de Oliveira Junior, Yahya Can Tugrul, Rahul Bera, Abdullah Giray Yaglikçi, Hasan Hassan, Oguz Ergin, Onur Mutlu
2024	A	`conf`	Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis. DSN Ismail Emir Yüksel, Yahya Can Tugrul, F. Nisa Bostanci, Geraldo F. Oliveira, A. Giray Yaglikçi, Ataberk Olgun, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu
2024	J	`jnl`	Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis. CoRR Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci, Geraldo F. Oliveira, Abdullah Giray Yaglikçi, Ataberk Olgun, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu
2024	A*	`conf`	Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. HPCA Abdullah Giray Yaglikçi, Yahya Can Tugrul, Geraldo F. Oliveira, Ismail Emir Yüksel, Ataberk Olgun, Haocong Luo, Onur Mutlu
2024	J	`jnl`	Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions. CoRR Abdullah Giray Yaglikçi, Yahya Can Tugrul, Geraldo F. Oliveira, Ismail Emir Yüksel, Ataberk Olgun, Haocong Luo, Onur Mutlu
2023	J	`jnl`	ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation. CoRR Ataberk Olgun, Yahya Can Tugrul, Nisa Bostanci, Ismail Emir Yuksel, Haocong Luo, Steve Rhyner, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Onur Mutlu
2023	—	`conf`	An Experimental Analysis of RowHammer in HBM2 DRAM Chips. DSN-S Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu
2023	J	`jnl`	An Experimental Analysis of RowHammer in HBM2 DRAM Chips. CoRR Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu
2023	B	`conf`	DEV-PIM: Dynamic Execution Validation with Processing-in-Memory. ETS Alperen Bolat, Yahya Can Tugrul, Seyyid Hikmet Çelik, Sakir Sezer, Marco Ottavi, Oguz Ergin
2023	J	`jnl`	DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa, Haocong Luo, Minesh Patel, Oguz Ergin, Onur Mutlu
2023	J	`jnl`	PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips. CoRR Ismail Emir Yuksel, Yahya Can Tugrul, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Ataberk Olgun, Geraldo F. Oliveira, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu
2023	J	`jnl`	Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator. CoRR Haocong Luo, Yahya Can Tugrul, F. Nisa Bostanci, Ataberk Olgun, Abdullah Giray Yaglikçi, Onur Mutlu
2023	A*	`conf`	RowPress: Amplifying Read Disturbance in Modern DRAM Chips. ISCA Haocong Luo, Ataberk Olgun, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu
2023	J	`jnl`	RowPress: Amplifying Read Disturbance in Modern DRAM Chips. CoRR Haocong Luo, Ataberk Olgun, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Steve Rhyner, Meryem Banu Cavlak, Joël Lindegger, Mohammad Sadrosadati, Onur Mutlu
2023	J	`jnl`	Understanding Read Disturbance in High Bandwidth Memory: An Experimental Analysis of Real HBM2 DRAM Chips. CoRR Ataberk Olgun, Majd Osseiran, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Haocong Luo, Steve Rhyner, Behzad Salami, Juan Gómez-Luna, Onur Mutlu
2022	J	`jnl`	DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips. CoRR Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa, Haocong Luo, Minesh Patel, Oguz Ergin, Onur Mutlu
2022	J	`jnl`	Sectored DRAM: An Energy-Efficient High-Throughput and Practical Fine-Grained DRAM Architecture. CoRR Ataberk Olgun, F. Nisa Bostanci, Geraldo F. Oliveira, Yahya Can Tugrul, Rahul Bera, Abdullah Giray Yaglikçi, Hasan Hassan, Oguz Ergin, Onur Mutlu
2022	J	`jnl`	TuRaN: True Random Number Generation Using Supply Voltage Underscaling in SRAMs. CoRR Ismail Emir Yüksel, Ataberk Olgun, Behzad Salami, F. Nisa Bostanci, Yahya Can Tugrul, Abdullah Giray Yaglikçi, Nika Mansouri-Ghiasi, Onur Mutlu, Oguz Ergin
2021	A*	`conf`	Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. MICRO Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu
2021	J	`jnl`	Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. CoRR Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.