Y. Tsiatouhas

31 papers A 2C 4Journal 6Unranked 19
YearRankTypeTitle / Venue / Authors
2013 J jnl
Adjustable RF Mixers' Alternate Test Efficiency Optimization by the Reduction of Test Observables.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
John Liaperdos, Angela Arapoyanni, Y. Tsiatouhas
2007 J jnl
Testable Designs of Multiple Precharged Domino Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Themistoklis Haniotakis, Y. Tsiatouhas, Dimitris Nikolos, Costas Efstathiou
2006 C conf
High fan-in differential current mirror logic.
ISCAS
Y. Tsiatouhas, Angela Arapoyanni
2005 — conf
A Built-In Self-Test Scheme for Differential Ring Oscillators.
ISQED
Lampros Dermentzoglou, Y. Tsiatouhas, Angela Arapoyanni
2005 C conf
Fast, Parallel Two-Rail Code Checker with Enhanced Testability.
IOLTS
Sotirios Matakias, Y. Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni, Aristides Efthymiou
2005 — conf
The Use of Pre-Evaluation Phase in Dynamic CMOS Logic.
ISVLSI
A. Rao, Th. Haniotakis, Y. Tsiatouhas, H. Djemil
2004 J jnl
A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs.
J. Electron. Test.
Sotirios Matakias, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis
2004 J jnl
A Design for Testability Scheme for CMOS LC-Tank Voltage Controlled Oscillators.
J. Electron. Test.
Lampros Dermentzoglou, Y. Tsiatouhas, Angela Arapoyanni
2004 C conf
A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations.
IOLTS
A. Rao, Th. Haniotakis, Y. Tsiatouhas, V. Kaky
2004 — conf
Ultra Fast and Low Cost Parallel Two-Rail Code Checker Targeting High Fan-In Applications .
ISVLSI
Sotirios Matakias, Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni
2003 C conf
A Sense Amplifier Based Circuit for Concurrent Detection of Soft and Timing Errors in CMOS ICs.
IOLTS
Y. Tsiatouhas, Sotirios Matakias, Angela Arapoyanni, Th. Haniotakis
2003 — conf
An Embedded IDDQ Testing Architecture and Technique.
ISQED
Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni
2002 — conf
A Hierarchical Architecture for Concurrent Soft Error Detection Based on Current Sensing.
IOLTW
Y. Tsiatouhas, Angela Arapoyanni, Dimitris Nikolos, Th. Haniotakis
2002 J jnl
A new technique for IDDQ testing in nanometer technologies.
Integr.
Y. Tsiatouhas, Yiannis Moisiadis, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni
2002 — conf
Extending the Viability of IDDQ Testing in the Deep Submicron Era.
ISQED
Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni
2002 — conf
SRAM oriented memory sense amplifier design in 0.18 μm CMOS technology.
ISCAS (5)
A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis
2001 — conf
A new flash memory sense amplifier in 0.18 μm CMOS technology.
ICECS
A. Chrisanthopoulos, Yiannis Moisiadis, A. Varagis, Y. Tsiatouhas, Angela Arapoyanni
2001 — conf
Concurrent Detection of Soft Errors Based on Current Monitoring.
IOLTW
Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Costas Efstathiou
2001 — conf
New test pattern generation units for NPSF oriented memory built-in self test.
ICECS
A. Chrisanthopoulos, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni
2000 — conf
A Compact Built-In Current Sensor for IDDQ Testing.
IOLTW
Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos
2000 A conf
A Versatile Built-In Self-Test Scheme for Delay Fault Testing.
DATE
Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni, Dimitris Nikolos
2000 — conf
A state assignment algorithm for finite state machines.
ICECS
Dionisis Skias, Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni
2000 — conf
A test pattern generation unit for memory NPSF built-in self test.
ICECS
A. Chrisanthopoulos, George Kamoulakos, Y. Tsiatouhas, Angela Arapoyanni
2000 J jnl
Management of charge pump circuits.
Integr.
George Kamoulakos, A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni
2000 — conf
New memory sense amplifier designs in CMOS technology.
ICECS
Y. Tsiatouhas, A. Chrisanthopoulos, George Kamoulakos, Th. Haniotakis
2000 — conf
On Testability of Multiple Precharged Domino Logic.
ISQED
Th. Haniotakis, Y. Tsiatouhas, Dimitris Nikolos, Costas Efstathiou
1999 — conf
A Zero Aliasing Built-In Self Test Technique for Delay Fault Testing.
DFT
Y. Tsiatouhas, Th. Haniotakis
1999 — conf
Novel domino logic designs.
ICECS
Th. Haniotakis, Y. Tsiatouhas, Angela Arapoyanni
1999 — conf
On Path Delay Fault Testing of Multiplexer - Based Shifters.
Great Lakes Symposium on VLSI
Haridimos T. Vergos, Dimitris Nikolos, Y. Tsiatouhas, Th. Haniotakis, Michael Nicolaidis
1999 A conf
Path Delay Fault Testing of ICs with Embedded Intellectual Property Blocks.
DATE
Dimitris Nikolos, Haridimos T. Vergos, Th. Haniotakis, Y. Tsiatouhas
1998 — conf
C-Testable One-Dimensional ILAs with Respect to Path Delay Faults: Theory and Applications.
DFT
Th. Haniotakis, Dimitris Nikolos, Y. Tsiatouhas