Xueqing Li - RankMe

163 papers A* 17A 16B 1C 12Misc 2Journal 68Unranked 47

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 16-bit 10-GS/s DAC Achieving >65-dBc SFDR and <-75-dBc IM3 up to the Nyquist in 28-nm CMOS. IEEE J. Solid State Circuits Chengyu Huang, Kezhuo Ma, Chenxi Jia, Sihao Chen, Ruiqi Zhao, Xinyu Zhou, Nan Sun, Huazhong Yang, Xueqing Li
2026	J	`jnl`	A Heterogeneous CIM Architecture With Splittable Nonvolatile Computing-in-SRAM Cell Pairs Enabling Efficient On-Chip Neural Network Inference. IEEE Trans. Very Large Scale Integr. Syst. Dengfeng Wang, Liukai Xu, Yiming Chen, Weifeng He, Guanghui He, Xueqing Li, Yanan Sun
2026	J	`jnl`	An Area-Efficient Lookup-Table -Based eDRAM Digital CIM Macro for Neural Network Inference. IEEE J. Solid State Circuits Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu
2026	J	`jnl`	An NVM Non-Idealities Mitigation Solution Using Cell-Clustered Calibration for Analog High-Density Edge Multi-Level Cell Compute-in-Memory. IEEE Trans. Circuits Syst. I Regul. Pap. Zimeng Xu, Taixin Li, Ming-Yen Lee, Chenxi Jia, Sheng Zhang, Sumitha George, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2025	C	`conf`	3D-Domino: Ultra-Dense High-Accuracy 3D eDRAM-ROM Compute-In-Memory Based on CAA-IGZO TFT for Edge Large-Scale Model Inference. ISCAS Zhuoya Wang, Wenjun Tang, Chen Jiang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2025	—	`conf`	3D-METRO: Deploy Large-Scale Transformer Model on A Chip Using Transistor-Less 3D-Metal-ROM-Based Compute-in-Memory Macro. ASP-DAC Yiming Chen, Xirui Du, Guodong Yin, Wenjun Tang, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	J	`jnl`	A 28-nm 8-Bit 16-GS/ DAC With >60 dBc/>40 dBc SFDR Up To 2.3 GHz/5.4 GHz Using 4-Channel NRZ-Output-Overlapped Time-Interleaving. IEEE Trans. Circuits Syst. II Express Briefs Sihao Chen, Chengyu Huang, Limeng Sun, Yang Liu, Wenjun Tang, Jiaxuan Fan, Nan Sun, Yong Chen, Huazhong Yang, Xueqing Li
2025	—	`conf`	A 28nm 26.9 Mb/mm CCMCC TianYi Yu, Ling-An Cheong, Zhonghao Chen, Teng Yi, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	J	`jnl`	A Multiply-Less Approximate SRAM Compute-In-Memory Macro for Neural-Network Inference. IEEE J. Solid State Circuits Haikang Diao, Yifan He, Xuan Li, Chen Tang, Wenbin Jia, Jinshan Yue, Haoyang Luo, Jiahao Song, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu, Yuan Wang, Xiyuan Tang
2025	C	`conf`	A Threshold-Voltage Compensation Circuit for Organic Thin-Film Transistor Active-Matrix Neurostimulation System. ISCAS Shikai Wang, Bowen Liu, Xueqing Li, Huazhong Yang, Yongpan Liu, Chen Jiang
2025	—	`conf`	ADDR: Architecture Design and Model Deployment Optimization for Hybrid SRAM-ROM Compute-in-Memory. ACM Great Lakes Symposium on VLSI Teng Wan, Yiming Chen, Zekai Chen, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	A	`conf`	DANCE: Dual-Side Agile N:M Sparse Compressed Digital CiM Accelerator for Efficient Compound AI. ICCAD Zhonghao Chen, Hongtao Zhong, Jianhe Deng, Mulin Shi, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	—	`conf`	DCiROM: A Fully Digital Compute-in-ROM Design Approach to High Energy Efficiency of DNN Inference at Task Level. ASP-DAC TianYi Yu, Tianyu Liao, Mufeng Zhou, Xiaotian Chu, Guodong Yin, Mingyen Lee, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	J	`jnl`	DCiROM: A High-Density Fully-Digital Compute-in-Read-Only-Memory Macro for Energy-Efficient Task-Level DNN Inference. IEEE Trans. Circuits Syst. I Regul. Pap. TianYi Yu, Tianyu Liao, Mufeng Zhou, Xiaotian Chu, Guodong Yin, Mingyen Lee, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	A*	`conf`	DIAS: Distance-based Attention Sparsity for Ultra-Long-Sequence Transformer with Tree-like Processing-in-Memory Architecture. DAC Zekai Chen, Yiming Chen, Teng Wan, TianYi Yu, Yu Wang, Huazhong Yang, Xueqing Li
2025	A	`conf`	DSC-ROM: A Fully Digital Sparsity-Compressed Compute-in-ROM Architecture for on-Chip Deployment of Large-Scale DNNs. DATE TianYi Yu, Zhonghao Chen, Yiming Chen, Shuang Wang, Yongpan Liu, Huazhong Yang, Xueqing Li
2025	J	`jnl`	Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm² Density in 28nm CMOS. IEEE J. Solid State Circuits Guodong Yin, Yiming Chen, Mingyen Lee, Xirui Du, Yue Ke, Wenjun Tang, Zhonghao Chen, Mufeng Zhou, Jinshan Yue, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2025	C	`conf`	Kung-Fu: An Energy-Efficient Compute-In-Memory Approach for Neural Network Inference Using Multi-Level Binary Computing Fusion. ISCAS Tianyu Liao, Yiming Chen, Wenjun Tang, Zhonghao Chen, Yu Wang, Huazhong Yang, Xueqing Li
2025	C	`conf`	LTPS-TFT-Based In-Sensor Compression with Spatiotemporal Differencing Optimization. ISCAS Deyun Chen, Wenjun Tang, Jialong Liu, Xueqing Li, Sheng Zhang, Huazhong Yang
2025	A*	`conf`	PUFiM: A Robust and Efficient FeFET-Based Security Solution Merging Physical Unclonable Function with Compute-in-Memory for Edge AI. DAC Taixin Li, Thomas Kämpfe, Jianfeng Wang, Kai Ni, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2025	—	`conf`	Pro-Cache-CIM: A 28nm 69.4TOPS/W Product-Cache-based Digital-Compute-in-Memory Macro Leveraging Data Locality Pattern in Vision AI Tasks. CICC Wenbin Jia, Yifan He, Xiang Li, Yixuan Xie, Zongle Huang, Wenxun Wang, Boju Chen, Yaolei Li, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu
2025	J	`jnl`	ROM-SRAM hybrid compute-in-memory for edge AI: circuits, architectures and challenges. J. Supercomput. Xirui Du, TianYi Yu, Hengping Zhou, Ling-An Cheong, Teng Wan, Huazhong Yang, Xueqing Li
2025	—	`conf`	SPIDER: A Sparsity-Aware High-Density Compute-in-ROM Architecture for Large-Scale Neural Networks On-Chip Deployment. CCMCC Tianyu Liao, TianYi Yu, Yiming Chen, Teng Yi, Yu Wang, Huazhong Yang, Xueqing Li
2024	—	`conf`	34.7 A 28nm 2.4Mb/mm ISSCC Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu
2024	C	`conf`	A 1024-Channel Neurostimulation System Enabled by Photolithographic Organic Thin-Film Transistors with High Uniformity. ISCAS Bowen Liu, Yangkun Hou, Yueshan Qin, Jiwei Zou, Hanbin Ma, Yongpan Liu, Huazhong Yang, Xueqing Li, Chen Jiang
2024	—	`conf`	A 16-bit 10-GS/s Calibration-Free DAC Achieving <-77dBc IM3 up to 4.95GHz in 28nm CMOS. CICC Chengyu Huang, Kezhuo Ma, Sihao Chen, Jiaxuan Fan, Nan Sun, Huazhong Yang, Xueqing Li
2024	J	`jnl`	A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2024	—	`conf`	A 28nm 166.9 TOPS/W x Mb/mm A-SSCC Ling-An Cheong, Chen Wang, Mufeng Zhou, Tianyu Liao, Mingyen Lee, Yue Ke, Wenjun Tang, Yiming Chen, Xirui Du, Yongpan Liu, Huazhong Yang, Xueqing Li
2024	—	`conf`	A 28nm 8928Kb/mm CICC Guodong Yin, Yiming Chen, Mingyen Lee, Xirui Du, Yue Ke, Wenjun Tang, Zhonghao Chen, Mufeng Zhou, Jinshan Yue, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2024	J	`jnl`	A Module-Level Configuration Methodology for Programmable Camouflaged Logic. ACM Trans. Design Autom. Electr. Syst. Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Ziheng Zheng, Enze Ye, Sumitha George, Huazhong Yang, Yongpan Liu, Kai Ni, Vijaykrishnan Narayanan, Xueqing Li
2024	J	`jnl`	An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang
2024	A	`conf`	CafeHD: A Charge-Domain FeFET-Based Compute-in-Memory Hyperdimensional Encoder with Hypervector Merging. DATE Taixin Li, Hongtao Zhong, Juejian Wu, Thomas Kämpfe, Kai Ni, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2024	A*	`conf`	CiMSAT: Exploiting SAT Analysis to Attack Compute-in-Memory Architecture Defenses. CCS Jianfeng Wang, Huazhong Yang, Shuwen Deng, Xueqing Li
2024	J	`jnl`	Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm IEEE J. Solid State Circuits Guodong Yin, Yiming Chen, Mufeng Zhou, Wenjun Tang, Mingyen Lee, Zekun Yang, Tianyu Liao, Xirui Du, Vijaykrishnan Narayanan, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2024	A*	`conf`	Cross-Layer Exploration and Chip Demonstration of In-Sensor Computing for Large-Area Applications with Differential-Frame ROM-Based Compute-In-Memory. DAC Jialong Liu, Wenjun Tang, Deyun Chen, Chen Jiang, Huazhong Yang, Xueqing Li
2024	J	`jnl`	GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility. IEEE Trans. Emerg. Top. Comput. Yiming Chen, Mingyen Lee, Guohao Dai, Mufeng Zhou, Nagadastagiri Challapalle, Tianyi Wang, Yao Yu, Yongpan Liu, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2024	A*	`conf`	HEIRS: Hybrid Three-Dimension RRAM- and SRAM-CIM Architecture for Multi-task Transformer Acceleration. DAC Liukai Xu, Shuai Yuan, Dengfeng Wang, Yiming Chen, Xueqing Li, Yanan Sun
2024	A	`conf`	NAND-Tree: A 3D NAND Flash Based Processing In Memory Accelerator for Tree-Based Models on Large-Scale Tabular Data. ICCAD Hongtao Zhong, Taixin Li, Yiming Chen, Wenjun Tang, Juejian Wu, Huazhong Yang, Xueqing Li
2024	J	`jnl`	ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories. ACM Trans. Design Autom. Electr. Syst. Taixin Li, Boran Sun, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Liang Shi, Tianyi Wang, Yao Yu, Thomas Kämpfe, Kai Ni, Huazhong Yang, Xueqing Li
2024	A	`conf`	REMNA: Variation-Resilient and Energy-Efficient MLC FeFET Computing-in-Memory Using NAND Flash-Like Read and Adaptive Control. ICCAD Taixin Li, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Kai Ni, Huazhong Yang, Thomas Kämpfe, Xueqing Li
2024	J	`jnl`	TFT-Based Near-Sensor In-Memory Computing: Circuits and Architecture Perspectives of Large-Area eDRAM and ROM CiM Chips. IEEE Trans. Circuits Syst. I Regul. Pap. Jialong Liu, Wenjun Tang, Hongtian Li, Deyun Chen, Weihang Long, Yongpan Liu, Chen Jiang, Huazhong Yang, Xueqing Li
2024	A	`conf`	TroScan: Enhancing On-Chip Delivery Resilience to Physical Attack Through Frequency-Triggered Key Generation. DATE Jianfeng Wang, Shuwen Deng, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2024	J	`jnl`	ULSeq-TA: Ultra-Long Sequence Attention Fusion Transformer Accelerator Supporting Grouped Sparse Softmax and Dual-Path Sparse LayerNorm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jingyu Wang, Lu Zhang, Xueqing Li, Huazhong Yang, Yongpan Liu
2024	B	`conf`	ZEBRA: A Zero-Bit Robust-Accumulation Compute-In-Memory Approach for Neural Network Acceleration Utilizing Different Bitwise Patterns. ASPDAC Yiming Chen, Guodong Yin, Hongtao Zhong, Mingyen Lee, Huazhong Yang, Sumitha George, Vijaykrishnan Narayanan, Xueqing Li
2023	—	`conf`	A 10TFLOPS Datacenter-Oriented GPU with 4-Corner Stacked 64GB Memory by The Means of 2.5D Packaging Technology. A-SSCC Shuang Wang, Weiliang Chen, Xueqing Li, Leibo Liu, Huazhong Yang
2023	J	`jnl`	A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving >70 dBc SFDR and < -80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted-Averaging. IEEE Trans. Circuits Syst. I Regul. Pap. Yushen Fu, Chengyu Huang, Longqiang Lai, Nan Sun, Xueqing Li, Huazhong Yang
2023	—	`conf`	A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2023	—	`conf`	A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference. ISSCC Yifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu
2023	—	`conf`	A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. VLSI Technology and Circuits Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu
2023	J	`jnl`	A 6.0-GS/s Time-Interleaved DAC Using an Asymmetric Current-Tree Summation Network and Differential Clock Timing Calibration. IEEE Trans. Very Large Scale Integr. Syst. Yushen Fu, Chengyu Huang, Limeng Sun, Weiguang Meng, Xueqing Li, Huazhong Yang
2023	A*	`conf`	ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. DAC Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2023	J	`jnl`	ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. CoRR Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2023	J	`jnl`	CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration. IEEE Trans. Circuits Syst. I Regul. Pap. Yanan Sun, Dengfeng Wang, Liukai Xu, Yiming Chen, Zhi Li, Songyuan Liu, Weifeng He, Yongpan Liu, Huazhong Yang, Xueqing Li
2023	—	`conf`	Design Exploration of Dynamic Multi-Level Ternary Content-Addressable Memory Using Nanoelectromechanical Relays. ISVLSI Taixin Li, Hongtao Zhong, Sumitha George, Vijaykrishnan Narayanan, Liang Shi, Huazhong Yang, Xueqing Li
2023	J	`jnl`	FAST: A Fully-Concurrent Access SRAM Topology for High Row-Wise Parallelism Applications Based on Dynamic Shift Operations. IEEE Trans. Circuits Syst. II Express Briefs Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2023	—	`conf`	Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks. ISVLSI Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li
2023	J	`jnl`	FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap. Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2023	J	`jnl`	Low-Power and Scalable BEOL-Compatible IGZO TFT eDRAM-Based Charge-Domain Computing. IEEE Trans. Circuits Syst. I Regul. Pap. Wenjun Tang, Jialong Liu, Chen Sun, Zijie Zheng, Yongpan Liu, Huazhong Yang, Chen Jiang, Kai Ni, Xiao Gong, Xueqing Li
2023	A	`conf`	Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. ICCAD Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li
2023	J	`jnl`	SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree. IEEE Trans. Circuits Syst. I Regul. Pap. Yiming Chen, Guodong Yin, Mufeng Zhou, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li
2023	A	`conf`	TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations. ICCAD Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li, Yiming Chen, Weifeng He, Xueqing Li, Yanan Sun
2023	J	`jnl`	TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations. CoRR Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li, Yiming Chen, Weifeng He, Xueqing Li, Yanan Sun
2023	A*	`conf`	Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM. DAC Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2023	—	`conf`	WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators. AICAS Jianfeng Wang, Zhonghao Chen, Yiming Chen, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Sumitha George, Huazhong Yang, Xueqing Li
2022	J	`jnl`	A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications. IEEE J. Solid State Circuits Yixiong Yang, Yongpan Liu, Zhe Yuan, Wenyu Sun, Ruoyang Liu, Jingyu Wang, Jinshan Yue, Xiaoyu Feng, Zhuqing Yuan, Xueqing Li, Huazhong Yang
2022	J	`jnl`	A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface. CoRR Guodong Yin, Mufeng Zhou, Yiming Chen, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li
2022	J	`jnl`	ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key. CoRR Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Enze Ye, Ziheng Zheng, Huazhong Yang, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li
2022	C	`conf`	An 8T/Cell FeFET-Based Nonvolatile SRAM with Improved Density and Sub-fJ Backup and Restore Energy. ISCAS Jianfeng Wang, Nuo Xiu, Juejian Wu, Yiming Chen, Yanan Sun, Huazhong Yang, Vijaykrishnan Narayanan, Sumitha George, Xueqing Li
2022	A*	`conf`	CREAM: computing in ReRAM-assisted energy and area-efficient SRAM for neural network acceleration. DAC Liukai Xu, Songyuan Liu, Zhi Li, Dengfeng Wang, Yiming Chen, Yanan Sun, Xueqing Li, Weifeng He, Shi Xu
2022	J	`jnl`	CapCAM: A Multilevel Capacitive Content Addressable Memory for High-Accuracy and High-Scalability Search and Compute Applications. IEEE Trans. Very Large Scale Integr. Syst. Xiaoyang Ma, Hongtao Zhong, Nuo Xiu, Yiming Chen, Guodong Yin, Vijaykrishnan Narayanan, Yongpan Liu, Kai Ni, Huazhong Yang, Xueqing Li
2022	J	`jnl`	Eliminating Leakage in Volatile Memory with Anti-Ferroelectric Transistors. CoRR Hongtao Zhong, Zijie Zheng, Kai Ni, Xiao Gong, Huazhong Yang, Xueqing Li
2022	J	`jnl`	FAST: A Fully-Concurrent Access Technique to All SRAM Rows for Enhanced Speed and Energy Efficiency in Data-Intensive Applications. CoRR Yiming Chen, Yushen Fu, Mingyen Lee, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2022	J	`jnl`	Ferroelectric FET-based strong physical unclonable function: a low-power, high-reliable and reconfigurable solution for Internet-of-Things security. CoRR Xinrui Guo, Xiaoyang Ma, Franz Müller, Kai Ni, Thomas Kämpfe, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li
2022	J	`jnl`	GRAPHIC: GatheR-And-Process in Highly parallel with In-SSD Compression Architecture in Very Large-Scale Graph. CoRR Yiming Chen, Guohao Dai, Mufeng Zhou, Mingyen Lee, Nagadastagiri Challapalle, Guodong Yin, Zekun Yang, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2022	A	`conf`	Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability. ICCAD Yiming Chen, Guodong Yin, Mingyen Lee, Wenjun Tang, Zekun Yang, Yongpan Liu, Huazhong Yang, Xueqing Li
2022	J	`jnl`	PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jingyu Wang, Songming Yu, Zhuqing Yuan, Jinshan Yue, Zhe Yuan, Ruoyang Liu, Yanzhi Wang, Huazhong Yang, Xueqing Li, Yongpan Liu
2022	J	`jnl`	STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. IEEE J. Solid State Circuits Jinshan Yue, Yongpan Liu, Zhe Yuan, Xiaoyu Feng, Yifan He, Wenyu Sun, Zhixiao Zhang, Xin Si, Ruhui Liu, Zi Wang, Meng-Fan Chang, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang
2022	J	`jnl`	YOLoC: DeploY Large-Scale Neural Network by ROM-based Computing-in-Memory using ResiduaL Branch on a Chip. CoRR Yiming Chen, Guodong Yin, Zhanhong Tan, Mingyen Lee, Zekun Yang, Yongpan Liu, Huazhong Yang, Kaisheng Ma, Xueqing Li
2022	A*	`conf`	YOLoC: deploy large-scale neural network by ROM-based computing-in-memory using residual branch on a chip. DAC Yiming Chen, Guodong Yin, Zhanhong Tan, Mingyen Lee, Zekun Yang, Yongpan Liu, Huazhong Yang, Kaisheng Ma, Xueqing Li
2021	—	`conf`	A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching. ESSCIRC Chengyu Huang, Yushen Fu, Zekun Yang, Yang Liu, Nan Sun, Xueqing Li, Huazhong Yang
2021	—	`conf`	A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating. ISSCC Jinshan Yue, Xiaoyu Feng, Yifan He, Yuxuan Huang, Yipeng Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hung, Meng-Fan Chang, Nan Sun, Xueqing Li, Huazhong Yang, Yongpan Liu
2021	C	`conf`	Almost-Nonvolatile IGZO-TFT-Based Near-Sensor In-Memory Computing. ISCAS Jialong Liu, Wenjun Tang, Yongpan Liu, Huazhong Yang, Xueqing Li
2021	—	`conf`	Capacitive Content-Addressable Memory: A Highly Reliable and Scalable Approach to Energy-Efficient Parallel Pattern Matching Applications. ACM Great Lakes Symposium on VLSI Nuo Xiu, Yiming Chen, Guodong Yin, Xiaoyang Ma, Huazhong Yang, Sumitha George, Xueqing Li
2021	J	`jnl`	DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays. IEEE Trans. Very Large Scale Integr. Syst. Hongtao Zhong, Shengjie Cao, Li Jiang, Xia An, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li
2021	C	`conf`	Dynamic Switching Sequence to Compensate the Integral Nonlinearity in Current-Steering DACs. ISCAS Yang Liu, Yushen Fu, Chengyu Huang, Huazhong Yang, Xueqing Li
2021	A	`conf`	Dynamic Ternary Content-Addressable Memory Is Indeed Promising: Design and Benchmarking Using Nanoelectromechanical Relays. DATE Hongtao Zhong, Shengjie Cao, Huazhong Yang, Xueqing Li
2021	J	`jnl`	Dynamic Ternary Content-Addressable Memory Is Indeed Promising: Design and Benchmarking Using Nanoelectromechanical Relays. CoRR Hongtao Zhong, Shengjie Cao, Huazhong Yang, Xueqing Li
2021	J	`jnl`	Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing With Ferroelectric FETs. IEEE Trans. Circuits Syst. II Express Briefs Guodong Yin, Yi Cai, Juejian Wu, Zhengyang Duan, Zhenhua Zhu, Yongpan Liu, Yu Wang, Huazhong Yang, Xueqing Li
2021	J	`jnl`	Enabling Lower-Power Charge-Domain Nonvolatile In-Memory Computing with Ferroelectric FETs. CoRR Guodong Yin, Yi Cai, Juejian Wu, Zhengyang Duan, Zhenhua Zhu, Yongpan Liu, Yu Wang, Huazhong Yang, Xueqing Li
2021	—	`conf`	Exploiting FeFET Switching Stochasticity for Low-Power Reconfigurable Physical Unclonable Function. ESSCIRC Xinrui Guo, Xiaoyang Ma, Franz Müller, Ricardo Olivo, Juejian Wu, Kai Ni, Thomas Kämpfe, Yongpan Liu, Huazhong Yang, Xueqing Li
2021	—	`conf`	Exploiting FeFET Switching Stochasticity for Low-Power Reconfigurable Physical Unclonable Function. ESSDERC Xinrui Guo, Xiaoyang Ma, Franz Müller, Ricardo Olivo, Juejian Wu, Kai Ni, Thomas Kämpfe, Yongpan Liu, Huazhong Yang, Xueqing Li
2021	—	`conf`	High Area/Energy Efficiency RRAM CNN Accelerator with Pattern-Pruning-Based Weight Mapping Scheme. NVMSA Songming Yu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang, Yongpan Liu
2021	C	`conf`	Reducing Signal Swing Overheads to Only 8% in Background 3 ISCAS Zekun Yang, Pei Yang, Xiumei Yin, Xueqing Li, Huazhong Yang
2021	J	`jnl`	STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration. IEEE J. Solid State Circuits Jinshan Yue, Yongpan Liu, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang
2020	—	`conf`	14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data Codec. ISSCC Zhe Yuan, Yixiong Yang, Jinshan Yue, Ruoyang Liu, Xiaoyu Feng, Zhiting Lin, Xiulong Wu, Xueqing Li, Huazhong Yang, Yongpan Liu
2020	—	`conf`	14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse. ISSCC Jinshan Yue, Zhe Yuan, Xiaoyu Feng, Yifan He, Zhixiao Zhang, Xin Si, Ruhui Liu, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu
2020	—	`conf`	Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory. ASP-DAC Juejian Wu, Yixin Xu, Bowen Xue, Yu Wang, Yongpan Liu, Huazhong Yang, Xueqing Li
2020	—	`conf`	Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting Systems. ACM Great Lakes Symposium on VLSI Keni Qiu, Mengying Zhao, Zhenge Jia, Jingtong Hu, Chun Jason Xue, Kaisheng Ma, Xueqing Li, Yongpan Liu, Vijaykrishnan Narayanan
2020	A	`conf`	Design of Almost-Nonvolatile Embedded DRAM Using Nanoelectromechanical Relay Devices. DATE Hongtao Zhong, Mingyang Gu, Juejian Wu, Huazhong Yang, Xueqing Li
2020	A	`conf`	FeFET-based low-power bitwise logic-in-memory with direct write-back and data-adaptive dynamic sensing interface. ISLPED Mingyen Lee, Wenjun Tang, Bowen Xue, Juejian Wu, Mingyuan Ma, Yu Wang, Yongpan Liu, Deliang Fan, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2020	J	`jnl`	High Area/Energy Efficiency RRAM CNN Accelerator with Kernel-Reordering Weight Mapping Scheme Based on Pattern Pruning. CoRR Songming Yu, Yongpan Liu, Lu Zhang, Jingyu Wang, Jinshan Yue, Zhuqing Yuan, Xueqing Li, Huazhong Yang
2020	A*	`conf`	High PE Utilization CNN Accelerator with Channel Fusion Supporting Pattern-Compressed Sparse Neural Networks. DAC Jingyu Wang, Songming Yu, Jinshan Yue, Zhe Yuan, Zhuqing Yuan, Huazhong Yang, Xueqing Li, Yongpan Liu
2020	—	`conf`	Integrated CAM-RAM Functionality using Ferroelectric FETs. ISQED Sumitha George, Nicholas Jao, Akshay Krishna Ramanathan, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan
2020	J	`jnl`	One-Shot Refresh: A Low-Power Low-Congestion Approach for Dynamic Memories. IEEE Trans. Circuits Syst. Hongtao Zhong, Mingyang Gu, Yu Wang, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2020	J	`jnl`	STICKER: An Energy-Efficient Multi-Sparsity Compatible Accelerator for Convolutional Neural Networks in 65-nm CMOS. IEEE J. Solid State Circuits Zhe Yuan, Yongpan Liu, Jinshan Yue, Yixiong Yang, Jingyu Wang, Xiaoyu Feng, Jian Zhao, Xueqing Li, Huazhong Yang
2019	—	`conf`	A 1.8mW Perception Chip with Near-Sensor Processing Scheme for Low-Power AIoT Applications. ISVLSI Zheyu Liu, Erxiang Ren, Li Luo, Qi Wei, Xing Wu, Xueqing Li, Fei Qiao, Xin-Jun Liu, Huazhong Yang
2019	J	`jnl`	A 130-nm Ferroelectric Nonvolatile System-on-Chip With Direct Peripheral Restore Architecture for Transient Computing System. IEEE J. Solid State Circuits Yongpan Liu, Fang Su, Yixiong Yang, Zhibo Wang, Yiqun Wang, Zewei Li, Xueqing Li, Ryuji Yoshimura, Takashi Naiki, Takashi Tsuwa, Takahiko Saito, Zhongjun Wang, Koji Taniuchi, Huazhong Yang
2019	—	`conf`	A 16b Clockless Digital-to-Analog Converter with Ultra-Low-Cost Poly Resistors Supporting Wide-Temperature Range from -40°C to 85°C. ACM Great Lakes Symposium on VLSI Xuedi Wang, Xueqing Li, Longqiang Lai, Huazhong Yang
2019	A*	`conf`	A 3T/Cell Practical Embedded Nonvolatile Memory Supporting Symmetric Read and Write Access Based on Ferroelectric FETs. DAC Juejian Wu, Hongtao Zhong, Kai Ni, Yongpan Liu, Huazhong Yang, Xueqing Li
2019	—	`conf`	A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm ISSCC Jinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu
2019	—	`conf`	A Sparse-Adaptive CNN Processor with Area/Performance balanced N-Way Set-Associate PE Arrays Assisted by a Collision-Aware Scheduler. A-SSCC Zhe Yuan, Jingyu Wang, Yixiong Yang, Jinshan Yue, Zhibo Wang, Xiaoyu Feng, Yanzhi Wang, Xueqing Li, Huazhong Yang, Yongpan Liu
2019	—	`conf`	AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip. ASP-DAC Jinshan Yue, Yongpan Liu, Fang Su, Shuangchen Li, Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang
2019	J	`jnl`	Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. Longqiang Lai, Xueqing Li, Yushen Fu, Yongpan Liu, Huazhong Yang
2019	J	`jnl`	Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs. IEEE Des. Test Xueqing Li, Juejian Wu, Kai Ni, Sumitha George, Kaisheng Ma, John Sampson, Sumeet Kumar Gupta, Yongpan Liu, Huazhong Yang, Suman Datta, Vijaykrishnan Narayanan
2019	J	`jnl`	Emerging technologies and computing paradigms for the Internet of Everything applications. International Journal of Circuit, Theory, and Applications. Int. J. Circuit Theory Appl. Aida Todri-Sanial, Xueqing Li, Juan Núñez
2019	—	`conf`	Enabling New Computing Paradigms with Emerging Symmetric-Access Memories. NANOARCH Juejian Wu, Mingyang Gu, Hongtao Zhong, Yunsong Tao, Fei Qiao, Huazhong Yang, Xueqing Li
2019	J	`jnl`	ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support. IEEE Trans. Circuits Syst. I Regul. Pap. Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Sumeet Kumar Gupta, Meng-Fan Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan
2019	J	`jnl`	Utilization of Negative-Capacitance FETs to Boost Analog Circuit Performances. IEEE Trans. Very Large Scale Integr. Syst. Yuhua Liang, Zhangming Zhu, Xueqing Li, Sumeet Kumar Gupta, Suman Datta, Vijaykrishnan Narayanan
2018	A	`conf`	A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support. ISLPED Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Fu-Kuo Hsueh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Sumeet Kumar Gupta, Meng-Fan Marvin Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan
2018	J	`jnl`	An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators. ACM J. Emerg. Technol. Comput. Syst. Neel Gala, Sarada Krithivasan, Wei-Yu Tsai, Xueqing Li, Vijaykrishnan Narayanan, V. Kamakoti
2018	J	`jnl`	Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. Srivatsa Rangachar Srinivasa, Xueqing Li, Meng-Fan Chang, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan
2018	J	`jnl`	IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors. IEEE Micro Kaisheng Ma, Jinyang Li, Xueqing Li, Yongpan Liu, Yuan Xie, Mahmut T. Kandemir, Jack Sampson, Vijaykrishnan Narayanan
2018	A*	`conf`	NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing. ASPLOS Kaisheng Ma, Xueqing Li, Mahmut Taylan Kandemir, Jack Sampson, Vijaykrishnan Narayanan, Jinyang Li, Tongda Wu, Zhibo Wang, Yongpan Liu, Yuan Xie
2018	J	`jnl`	Redundancy-bandwidth scalable techniques for signal-independent element transition rates in high-speed current-steering DACs. Int. J. Circuit Theory Appl. Longqiang Lai, Xueqing Li, Huazhong Yang
2018	—	`conf`	Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers. VLSI Circuits Zhe Yuan, Jinshan Yue, Huanrui Yang, Zhibo Wang, Jinyang Li, Yixiong Yang, Qingwei Guo, Xueqing Li, Meng-Fan Chang, Huazhong Yang, Yongpan Liu
2018	J	`jnl`	Symmetric 2-D-Memory Access to Multidimensional Data. IEEE Trans. Very Large Scale Integr. Syst. Sumitha George, Xueqing Li, Minli Julie Liao, Kaisheng Ma, Srivatsa Rangachar Srinivasa, Karthik Mohan, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan
2017	J	`jnl`	Advancing Nonvolatile Computing With Nonvolatile NCFET Latches and Flip-Flops. IEEE Trans. Circuits Syst. I Regul. Pap. Xueqing Li, Sumitha George, Kaisheng Ma, Wei-Yu Tsai, Ahmedullah Aziz, John Sampson, Sumeet Kumar Gupta, Meng-Fan Chang, Yongpan Liu, Suman Datta, Vijaykrishnan Narayanan
2017	J	`jnl`	Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems. ACM Trans. Embed. Comput. Syst. Kaisheng Ma, Xueqing Li, Huichu Liu, Xiao Sheng, Yiqun Wang, Karthik Swaminathan, Yongpan Liu, Yuan Xie, John Sampson, Vijaykrishnan Narayanan
2017	—	`conf`	Evaluating tradeoffs in granularity and overheads in supporting nonvolatile execution semantics. ISQED Kaisheng Ma, Minli Julie Liao, Xueqing Li, Zhixuan Huan, Jack Sampson
2017	—	`conf`	Harnessing ferroelectrics for non-volatile memories and logic. ISQED Sumeet Kumar Gupta, Danni Wang, Sumitha George, Ahmedullah Aziz, Xueqing Li, Suman Datta, Vijaykrishnan Narayanan
2017	—	`conf`	Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via. ISVLSI Srivatsa Rangachar Srinivasa, Karthik Mohan, Wei-Hao Chen, Kuo-Hsinag Hsu, Xueqing Li, Meng-Fan Chang, Sumeet Kumar Gupta, John Sampson, Vijaykrishnan Narayanan
2017	A*	`conf`	Incidental computing on IoT nonvolatile processors. MICRO Kaisheng Ma, Xueqing Li, Jinyang Li, Yongpan Liu, Yuan Xie, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan
2017	J	`jnl`	Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes. IEEE Trans. Circuits Syst. II Express Briefs Yinan Sun, Zhe Yuan, Yongpan Liu, Xueqing Li, Yu Wang, Qi Wei, Yiqun Wang, Vijaykrishnan Narayanan, Huazhong Yang
2017	A	`conf`	Nonvolatile processors: Why is it trending? DATE Fang Su, Kaisheng Ma, Xueqing Li, Tongda Wu, Yongpan Liu, Vijaykrishnan Narayanan
2017	—	`conf`	Spendthrift: Machine learning based resource and frequency scaling for ambient energy harvesting nonvolatile processors. ASP-DAC Kaisheng Ma, Xueqing Li, Srivatsa Rangachar Srinivasa, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan
2016	J	`jnl`	Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells. ACM J. Emerg. Technol. Comput. Syst. Moon Seok Kim, William Cane-Wissing, Xueqing Li, Jack Sampson, Suman Datta, Sumeet Kumar Gupta, Vijaykrishnan Narayanan
2016	—	`conf`	Device Circuit Co Design of FEFET Based Logic for Low Voltage Processors. ISVLSI Sumitha George, Ahmedullah Aziz, Xueqing Li, Moon Seok Kim, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan
2016	—	`conf`	Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures. VLSI-SoC (Selected Papers) Xueqing Li, Kaisheng Ma, Sumitha George, John Sampson, Vijaykrishnan Narayanan
2016	C	`conf`	Enabling Internet-of-Things: Opportunities brought by emerging devices, circuits, and architectures. VLSI-SoC Xueqing Li, Kaisheng Ma, Sumitha George, John Sampson, Vijaykrishnan Narayanan
2016	J	`jnl`	Enabling New Computation Paradigms with HyperFET - An Emerging Device. IEEE Trans. Multi Scale Comput. Syst. Wei-Yu Tsai, Xueqing Li, Matthew Jerry, Baihua Xie, Nikhil Shukla, Huichu Liu, Nandhini Chandramoorthy, Matthew Cotter, Arijit Raychowdhury, Donald M. Chiarulli, Steven P. Levitan, Suman Datta, John Sampson, Nagarajan Ranganathan, Vijaykrishnan Narayanan
2016	J	`jnl`	Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs. IEEE Trans. Very Large Scale Integr. Syst. Moon Seok Kim, Xueqing Li, Huichu Liu, John Sampson, Suman Datta, Vijaykrishnan Narayanan
2016	J	`jnl`	Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power. IEEE Micro Kaisheng Ma, Xueqing Li, Karthik Swaminathan, Yang Zheng, Shuangchen Li, Yongpan Liu, Yuan Xie, John (Jack) Morgan Sampson, Vijaykrishnan Narayanan
2016	A*	`conf`	Nonvolatile memory design based on ferroelectric FETs. DAC Sumitha George, Kaisheng Ma, Ahmedullah Aziz, Xueqing Li, Asif Islam Khan, Sayeef S. Salahuddin, Meng-Fan Chang, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan
2016	J	`jnl`	Solar Power Prediction Assisted Intra-task Scheduling for Nonvolatile Sensor Nodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Daming Zhang, Yongpan Liu, Jinyang Li, Chun Jason Xue, Xueqing Li, Yu Wang, Huazhong Yang
2015	C	`conf`	A 14-bit 1.0-GS/s dynamic element matching DAC with >80 dB SFDR up to the Nyquist. ISCAS Jianan Liu, Xueqing Li, Qi Wei, Huazhong Yang
2015	Misc	`conf`	A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications. VLSID Unsuk Heo, Xueqing Li, Huichu Liu, Sumeet Kumar Gupta, Suman Datta, Vijaykrishnan Narayanan
2015	A*	`conf`	Ambient energy harvesting nonvolatile processors: from circuit to system. DAC Yongpan Liu, Zewei Li, Hehe Li, Yiqun Wang, Xueqing Li, Kaisheng Ma, Shuangchen Li, Meng-Fan Chang, John Sampson, Yuan Xie, Jiwu Shu, Huazhong Yang
2015	A*	`conf`	Architecture exploration for ambient energy harvesting nonvolatile processors. HPCA Kaisheng Ma, Yang Zheng, Shuangchen Li, Karthik Swaminathan, Xueqing Li, Yongpan Liu, Jack Sampson, Yuan Xie, Vijaykrishnan Narayanan
2015	A	`conf`	Dynamic Machine Learning Based Matching of Nonvolatile Processor Microarchitecture to Harvested Energy Profile. ICCAD Kaisheng Ma, Xueqing Li, Yongpan Liu, John Sampson, Yuan Xie, Vijaykrishnan Narayanan
2015	J	`jnl`	Nonvolatile Processor Architecture Exploration for Energy-Harvesting Applications. IEEE Micro Kaisheng Ma, Xueqing Li, Shuangchen Li, Yongpan Liu, John (Jack) Morgan Sampson, Yuan Xie, Vijaykrishnan Narayanan
2015	Misc	`conf`	Self-powered wearable sensor node: Challenges and opportunities. CASES Yongpan Liu, Hehe Li, Xueqing Li, Chun Jason Xue, Yuan Xie, Huazhong Yang
2015	—	`conf`	Using Multiple-Input NEMS for Parallel A/D Conversion and Image Processing. ISVLSI Kaisheng Ma, Nandhini Chandramoorthy, Xueqing Li, Sumeet Kumar Gupta, John Sampson, Yuan Xie, Vijaykrishnan Narayanan
2014	J	`jnl`	A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ. IEEE Trans. Circuits Syst. I Regul. Pap. Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang, Huazhong Yang
2014	—	`conf`	A Low-Voltage Low-Power LC Oscillator Using the Diode-Connected SymFET. ISVLSI Xueqing Li, Wei-Yu Tsai, Huichu Liu, Suman Datta, Vijaykrishnan Narayanan
2014	—	`conf`	Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed. ISVLSI Kaisheng Ma, Huichu Liu, Yang Xiao, Yang Zheng, Xueqing Li, Sumeet Kumar Gupta, Yuan Xie, Vijaykrishnan Narayanan
2014	C	`conf`	Low-power high-speed current mode logic using Tunnel-FETs. VLSI-SoC Wei-Yu Tsai, Huichu Liu, Xueqing Li, Vijaykrishnan Narayanan
2014	—	`conf`	Rf-powered systems using steep-slope devices. NEWCAS Xueqing Li, Unsuk Dennis Heo, Kaisheng Ma, Vijaykrishnan Narayanan, Huichu Liu, Suman Datta
2014	A*	`conf`	Steep Slope Devices: Enabling New Architectural Paradigms. DAC Karthik Swaminathan, Huichu Liu, Xueqing Li, Moon Seok Kim, Jack Sampson, Vijaykrishnan Narayanan
2014	J	`jnl`	Tunnel FET RF Rectifier Design for Energy Harvesting Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. Huichu Liu, Xueqing Li, Ramesh Vaddi, Kaisheng Ma, Suman Datta, Vijaykrishnan Narayanan
2014	A	`conf`	Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition. ISLPED Huichu Liu, Mahsa Shoaran, Xueqing Li, Suman Datta, Alexandre Schmid, Vijaykrishnan Narayanan
2014	—	`conf`	Understanding the landscape of accelerators for vision. SiPS Nandhini Chandramoorthy, Karthik Swaminathan, Matthew Cotter, Xueqing Li, Indranil Palit, Xiaobo Sharon Hu, Michael T. Niemier, Kevin M. Irick
2012	J	`jnl`	Balanced Switching Schemes for Gradient-Error Compensation in Current-Steering DACs. IEICE Trans. Electron. Xueqing Li, Qi Wei, Fei Qiao, Huazhong Yang
2011	—	`conf`	Code-independent output impedance: A new approach to increasing the linearity of current-steering DACs. ICECS Xueqing Li, Qi Wei, Huazhong Yang