Xuechao Wei - RankMe

26 papers A* 6A 7B 3C 1Journal 6Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Klotski v2: Improved DNN Model Orchestration Framework for Dataflow Architecture Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
2025	J	`jnl`	RadiK: Scalable and Optimized GPU-Parallel Radix Top-K Selection. CoRR Yifei Li, Bole Zhou, Jiejing Zhang, Xuechao Wei, Yinghan Li, Yingda Chen
2024	A*	`conf`	ArkVale: Efficient Generative LLM Inference with Recallable Key-Value Eviction. NeurIPS Renze Chen, Zhuofeng Wang, Beiquan Cao, Tong Wu, Size Zheng, Xiuhong Li, Xuechao Wei, Shengen Yan, Meng Li, Yun Liang
2024	B	`conf`	POSTER: RadiK: Scalable Radix Top-K Selection on GPUs. PPoPP Yifei Li, Bole Zhou, Jiejing Zhang, Xuechao Wei, Yinghan Li, Yingda Chen
2024	A*	`conf`	PT-Map: Efficient Program Transformation Optimization for CGRA Mapping. DAC Bizhao Shi, Tuo Dai, Jiaxi Zhang, Xuechao Wei, Guojie Luo
2024	A	`conf`	RadiK: Scalable and Optimized GPU-Parallel Radix Top-K Selection. ICS Yifei Li, Bole Zhou, Jiejing Zhang, Xuechao Wei, Yinghan Li, Yingda Chen
2023	J	`jnl`	An ACM Trans. Embed. Comput. Syst. Zhengzheng Ma, Tuo Dai, Xuechao Wei, Guojie Luo
2023	A*	`conf`	ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis. MICRO Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie
2023	J	`jnl`	Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie
2023	A	`conf`	Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators. ICCAD Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
2022	A	`conf`	2022 ICCAD CAD Contest Problem C: Microarchitecture Design Space Exploration. ICCAD Sicheng Li, Chen Bai, Xuechao Wei, Bizhao Shi, Yen-Kuang Chen, Yuan Xie
2022	B	`conf`	GNNear: Accelerating Full-Batch Training of Graph Neural Networks with near-Memory Processing. PACT Zhe Zhou, Cong Li, Xuechao Wei, Xiaoyang Wang, Guangyu Sun
2022	—	`conf`	PetS: A Unified Framework for Parameter-Efficient Transformers Serving. USENIX ATC Zhe Zhou, Xuechao Wei, Jiejing Zhang, Guangyu Sun
2021	J	`jnl`	GCNear: A Hybrid Architecture for Efficient GCN Training with Near-Memory Processing. CoRR Zhe Zhou, Cong Li, Xuechao Wei, Guangyu Sun
2020	A*	`conf`	FTDL: A Tailored FPGA-Overlay for Deep Learning with High Scalability. DAC Runbin Shi, Yuhao Ding, Xuechao Wei, He Li, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding
2020	A	`conf`	FTDL: An FPGA-tailored Architecture for Deep Learning Systems. FPGA Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding
2020	J	`jnl`	Generating Systolic Array Accelerators With Reusable Blocks. IEEE Micro Liancheng Jia, Liqiang Lu, Xuechao Wei, Yun Liang
2019	C	`conf`	Frequency Improvement of Systolic Array-Based CNNs on FPGAs. ISCAS Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong
2019	A	`conf`	Overcoming Data Transfer Bottlenecks in DNN Accelerators via Layer-Conscious Memory Managment. FPGA Xuechao Wei, Yun Liang, Peng Zhang, Cody Hao Yu, Jason Cong
2019	A*	`conf`	Overcoming Data Transfer Bottlenecks in FPGA-based DNN Accelerators via Layer Conscious Memory Management. DAC Xuechao Wei, Yun Liang, Jason Cong
2018	A	`conf`	TGPA: tile-grained pipeline architecture for low latency CNN inference. ICCAD Xuechao Wei, Yun Liang, Xiuhong Li, Cody Hao Yu, Peng Zhang, Jason Cong
2017	A*	`conf`	Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs. DAC Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong
2017	—	`conf`	Throughput optimization for streaming applications on CPU-FPGA heterogeneous systems. ASP-DAC Xuechao Wei, Yun Liang, Tao Wang, Songwu Lu, Jason Cong
2012	—	`conf`	Distributed Control Independence for Composable Multi-processors. ACIS-ICIS Mengjie Mao, Hong An, Tao Sun, Qi Li, Bobin Deng, Xuechao Wei, Junrui Zhou
2012	A	`conf`	Distributed replay protocol for distributed uniprocessors. ICS Mengjie Mao, Hong An, Bobin Deng, Tao Sun, Xuechao Wei, Wei Zhou, Wenting Han
2012	B	`conf`	FlexBFS: a parallelism-aware implementation of breadth-first search on GPU. PPoPP Gu Liu, Hong An, Wenting Han, Xiaoqiang Li, Tao Sun, Wei Zhou, Xuechao Wei, Xulong Tang