| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2017 | J | jnl |
J. Supercomput.
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | J | jnl |
J. Supercomput.
|
| 2013 | A* | conf |
DAC
|
| 2013 | A | conf |
ICCAD
|
| 2013 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2012 | A | conf |
SC
|
| 2012 | A | conf |
ICCAD
|
| 2011 | J | jnl |
Comput. Electr. Eng.
|
| 2011 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2011 | A | conf |
ICCAD
|
| 2010 | A | conf |
ICCAD
|
| 2010 | A* | conf |
An efficient dual algorithm for vectorless power grid verification under linear current constraints.
DAC
|