| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2017 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign.
ACM J. Emerg. Technol. Comput. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | A | conf |
DATE
|
| 2015 | — | conf |
ASP-DAC
|
| 2015 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2014 | A | conf |
DATE
|
| 2014 | J | jnl |
IEEE Trans. Computers
|
| 2014 | J | jnl |
ACM J. Emerg. Technol. Comput. Syst.
|
| 2014 | J | jnl |
ACM J. Emerg. Technol. Comput. Syst.
|
| 2014 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2014 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2014 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2013 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2013 | A | conf |
DATE
|
| 2013 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2013 | J | jnl |
IEEE Trans. Parallel Distributed Syst.
|
| 2013 | J | jnl |
Knowl. Based Syst.
|
| 2013 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2013 | C | conf |
ISCAS
|
| 2011 | — | conf |
ISVLSI
|
| 2011 | — | conf |
ISVLSI
|
| 2011 | — | conf |
ISVLSI
|
| 2010 | A* | conf |
DAC
|
| 2010 | — | conf |
NANOARCH
|