Xuan-Tu Tran

58 papers B 1C 6Journal 23Unranked 28
YearRankTypeTitle / Venue / Authors
2025 — conf
Exploring 0.3V Inverter Based OTA Designs with NOR3-Based Common Mode Feedback.
NewCAS
Riccardo Della Sala, Orazio Aiello, Ngo-Doanh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, Giuseppe Scotti
2025 — conf
LogicCraft: LLM-Assisted Optimization of Netlist to Layout for Complex Custom Standard Cell Designs.
AICAS
Minwei Lin, Duy-Hieu Bui, Chao Wang, Wangzilu Lu, Ruoyu Tang, Qing Zhang, Yuhang Zhang, Jian Zhao, Xuan-Tu Tran, Yongfu Li
2025 J jnl
SRAM-based Physically Unclonable Function using Lightweight Hamming-Code Fuzzy Extractor for Energy Harvesting Beat Sensors.
CoRR
Hoang-Long Pham, Duy-Hieu Bui, Xuan-Tu Tran, Orazio Aiello
2024 J jnl
A light-weight neuromorphic controlling clock gating based multi-core cryptography platform.
Microprocess. Microsystems
Pham-Khoi Dong, Khanh N. Dang, Duy-Anh Nguyen, Xuan-Tu Tran
2023 J jnl
An In-Situ Dynamic Quantization With 3D Stacking Synaptic Memory for Power-Aware Neuromorphic Architecture.
IEEE Access
Ngo-Doanh Nguyen, Xuan-Tu Tran, Abderazek Ben Abdallah, Khanh N. Dang
2023 — conf
Low-cost Low-Power Implementation of Binary Edwards Curve for Secure Passive RFID Tags.
MCSoC
Hiep Manh Dao, Vincent Beroulle, Yann Kieffer, Xuan-Tu Tran, Duy-Hieu Bui
2022 J jnl
A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks.
Microprocess. Microsystems
Duy-Anh Nguyen, Xuan-Tu Tran, Khanh N. Dang, Francesca Iacopi
2022 — conf
An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection.
ICICDT
Ngo-Doanh Nguyen, Duy-Hieu Bui, Fawnizu Azmadi Hussin, Xuan-Tu Tran
2022 — conf
Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT Devices.
MCSoC
Mohammed Omar Awadh Al-Shatari, Fawnizu Azmadi Hussin, Azrina Abd Aziz, Mohd Saufy Rohmad, Xuan-Tu Tran
2022 J jnl
Design and Implementation of a Coarse-grained Dynamically Reconfigurable Multimedia Accelerator.
ACM Trans. Parallel Comput.
Hung K. Nguyen, Xuan-Tu Tran
2022 — conf
GAQ-SNN: A Genetic Algorithm based Quantization Framework for Deep Spiking Neural Networks.
ICICDT
Duy-Anh Nguyen, Xuan-Tu Tran, Francesca Iacopi
2022 J jnl
HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2021 J jnl
A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Trong-Thuc Hoang, Ronaldo Serrano, Van-Phuc Hoang, Xuan-Tu Tran, Koichiro Ishibashi, Cong-Kha Pham
2021 J jnl
A proposal for enhancing training speed in deep learning models based on memory activity survey.
IEICE Electron. Express
Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Khai-Duy Nguyen, Xuan-Tu Tran, Cong-Kha Pham
2021 J jnl
A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction.
IEICE Electron. Express
Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Xuan-Tu Tran, Cong-Kha Pham
2020 — conf
A Lightweight AEAD encryption core to secure IoT applications.
APCCAS
Ngo-Doanh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran
2020 J jnl
A Non-Blocking Non-Degrading Multiple Defects Link Testing Method for 3D-Networks-on-Chip.
IEEE Access
Khanh N. Dang, Michael Conrad Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2020 J jnl
A Thermal-Aware On-Line Fault Tolerance Method for TSV Lifetime Reliability in 3D-NoC Systems.
IEEE Access
Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2020 — conf
A lightweight Max-Pooling method and architecture for Deep Spiking Convolutional Neural Networks.
APCCAS
Duy-Anh Nguyen, Xuan-Tu Tran, Khanh N. Dang, Francesca Iacopi
2020 J jnl
FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices.
IEEE Access
Mohammed Omar Awadh Al-Shatari, Fawnizu Azmadi Hussin, Azrina Abd Aziz, Gunawan Witjaksono, Xuan-Tu Tran
2020 — conf
Low-Power Implementation of a High-Throughput Multi-core AES Encryption Architecture.
APCCAS
Pham-Khoi Dong, Hung K. Nguyen, Van-Phuc Hoang, Xuan-Tu Tran
2020 J jnl
Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).
IEICE Electron. Express
Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Errors in Stationary Blocks.
EAI Endorsed Trans. Ind. Networks Intell. Syst.
Xuan-Tu Tran, Ngoc-Sinh Nguyen, Duy-Hieu Bui, Minh-Trien Pham, Hung K. Nguyen, Cong-Kha Pham
2020 J jnl
Report on power, thermal and reliability prediction for 3D Networks-on-Chip.
CoRR
Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2020 J jnl
TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2019 — conf
2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults.
APCCAS
Khanh N. Dang, Michael Conrad Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2019 — conf
A 45nm High-Throughput and Low Latency AES Encryption for Real-Time Applications.
ISCIT
Pham-Khoi Dong, Hung K. Nguyen, Xuan-Tu Tran
2019 — conf
A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization.
APCCAS
Ngo-Doanh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran
2019 C conf
A Wideband High Efficiency Ka-Band MMIC Power Amplifier for 5G Wireless Communications.
ISCAS
Duy P. Nguyen, Xuan-Tu Tran, Nguyen L. K. Nguyen, Phat T. Nguyen, Anh-Vu Pham
2019 J jnl
A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs.
J. Syst. Archit.
Hung K. Nguyen, Xuan-Tu Tran
2019 — conf
An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks.
SoCC
Duy-Anh Nguyen, Duy-Hieu Bui, Francesca Iacopi, Xuan-Tu Tran
2019 — conf
An on-Communication Multiple-TSV Defects Detection and Localization for Real-Time 3D-ICs.
MCSoC
Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran
2019 — conf
High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages.
MWSCAS
Duy P. Nguyen, Xuan-Tu Tran, Phat T. Nguyen, Nguyen L. K. Nguyen, Anh-Vu Pham
2019 — conf
TSV-IaS: Analytic Analysis and Low-Cost Non-Preemptive on-Line Detection and Correction Method for TSV Defects.
ISVLSI
Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran
2018 — conf
A novel priority-driven arbiter for the router in reconfigurable Network-on-Chips.
ICICDT
Hung K. Nguyen, Xuan-Tu Tran
2018 — conf
Parity-Based ECC and Mechanism for Detecting and Correcting Soft Errors in On-Chip Communication.
MCSoC
Khanh N. Dang, Xuan-Tu Tran
2017 J jnl
A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model.
IEEE Trans. Very Large Scale Integr. Syst.
Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran, Yuichi Okuyama, Abderazek Ben Abdallah
2017 J jnl
AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigné, Xuan-Tu Tran
2017 J jnl
AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Xuan-Tu Tran, Tung Nguyen, Hai-Phong Phan, Duy-Hieu Bui
2017 — conf
Power consumption estimation using VNOC2.0 simulator for a fuzzy-logic based low power Network-on-Chip.
ICICDT
Hai-Phong Phan, Xuan-Tu Tran, Tomohiro Yoneda
2016 — conf
Ultra low-power and low-energy 32-bit datapath AES architecture for IoT applications.
ICICDT
Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigné, Xuan-Tu Tran
2015 — conf
Soft-error resilient 3D Network-on-Chip router.
iCAST
Khanh N. Dang, Michael Conrad Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, Xuan-Tu Tran
2014 C conf
An efficient hardware architecture for inter-prediction in H.264/AVC encoders.
DDECS
Nam-Khanh Dang, Xuan-Tu Tran, Alain Merirot
2014 C conf
FIFO-level-based power management and its application to an H.264 encoder.
IECON
Ngoc-Mai Nguyen, Warody Lombardi, Edith Beigné, Suzanne Lesecq, Xuan-Tu Tran
2014 — conf
H.264/AVC hardware encoders and low-power features.
APCCAS
Ngoc-Mai Nguyen, Edith Beigné, Suzanne Lesecq, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran
2014 — conf
Reducing temporal redundancy in MJPEG using Zipfian estimation techniques.
APCCAS
Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran
2013 J jnl
A generalized model for investigating scheduling schemes in computational clusters.
Simul. Model. Pract. Theory
Tien Van Do, Binh Thai Vu, Xuan-Tu Tran, Anh P. Nguyen
2013 — conf
Design and Implementation of a SoPC System for Speech Recognition.
MUE
Tran Van Hoang, Thien Truong Nguyen-Ly, Hoang Trang, Xuan-Tu Tran
2013 — conf
High-performance adaption of ARM processors into Network-on-Chip architectures.
SoCC
Tung Nguyen, Duy-Hieu Bui, Hai-Phong Phan, Trong-Trinh Dang, Xuan-Tu Tran
2012 C conf
A Model of Vietnamese Person Named Entity Question Answering System.
PACLIC
Mai-Vu Tran, Duc-Trong Le, Xuan-Tu Tran, Tien-Tung Nguyen
2011 C conf
Cost-efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC encoders.
DDECS
Xuan-Tu Tran, Van-Huan Tran
2010 — conf
User Interest Analysis with Hidden Topic in News Recommendation System.
IALP
Mai-Vu Tran, Xuan-Tu Tran, Huy-Long Uong
2009 J jnl
An Asynchronous Power Aware and Adaptive NoC Based Circuit.
IEEE J. Solid State Circuits
Edith Beigné, Fabien Clermidy, Hélène Lhermet, Sylvain Miermont, Yvain Thonnart, Xuan-Tu Tran, Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, Hugo Lebreton
2009 J jnl
Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application.
IET Comput. Digit. Tech.
Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach
2008 — conf
A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application.
NOCS
Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach
2007 — conf
Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip.
NOCS
Xuan-Tu Tran, Jean Durupt, Yvain Thonnart, François Bertrand, Vincent Beroulle, Chantal Robach
2006 B conf
A DFT Architecture for Asynchronous Networks-on-Chip.
ETS
Xuan-Tu Tran, Jean Durupt, François Bertrand, Vincent Beroulle, Chantal Robach
2006 C conf
Design-for-Test of Asynchronous Networks-on-Chip.
DDECS
Xuan-Tu Tran, Vincent Beroulle, Jean Durupt, Chantal Robach, François Bertrand