Xu Guo

12 papers A 4C 1Journal 3Unranked 4
YearRankTypeTitle / Venue / Authors
2013 J jnl
Design and benchmarking of an ASIC with five SHA-3 finalist candidates.
Microprocess. Microsystems
Meeta Srivastav, Xu Guo, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont
2013 — conf
Study of ASIC technology impact factors on performance evaluation of SHA-3 candidates.
ACM Great Lakes Symposium on VLSI
Meeta Srivastav, Yongbo Zuo, Xu Guo, Leyla Nazhandali, Patrick Schaumont
2012 A conf
ASIC implementations of five SHA-3 finalists.
DATE
Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont
2011 A conf
Data-oriented performance analysis of SHA-3 candidates on FPGA accelerated computers.
DATE
Zhimin Chen, Xu Guo, Ambuj Sinha, Patrick Schaumont
2011 C conf
Pre-silicon Characterization of NIST SHA-3 Final Round Candidates.
DSD
Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont
2010 J jnl
On The Impact of Target Technology in SHA-3 Hardware Benchmark Rankings.
IACR Cryptol. ePrint Arch.
Xu Guo, Sinan Huang, Leyla Nazhandali, Patrick Schaumont
2010 J jnl
Optimized System-on-Chip Integration of a Programmable ECC Coprocessor.
ACM Trans. Reconfigurable Technol. Syst.
Xu Guo, Patrick Schaumont
2010 — conf
State-of-the-art of Secure ECC Implementations: A Survey on Known Side-channel Attacks and Countermeasures.
HOST
Junfeng Fan, Xu Guo, Elke De Mulder, Patrick Schaumont, Bart Preneel, Ingrid Verbauwhede
2009 — conf
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform.
ARC
Xu Guo, Patrick Schaumont
2009 A conf
Optimizing the HW/SW boundary of an ECC SoC design using control hierarchy and distributed storage.
DATE
Xu Guo, Patrick Schaumont
2009 A conf
Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security.
CHES
Xu Guo, Junfeng Fan, Patrick Schaumont, Ingrid Verbauwhede
2008 — conf
Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors.
SAMOS
Xu Guo, Zhimin Chen, Patrick Schaumont