Xingsheng Wang

25 papers A* 1A 2C 4Journal 9Unranked 9
YearRankTypeTitle / Venue / Authors
2025 C conf
A Novel Memristor-Based Majority Logic and Efficient Approximate Full Adder for Image Processing.
ISCAS
Zhouchao Gan, Yifeng Xiong, Fan Yang, Mengjie Li, Xiangshui Miao, Xingsheng Wang
2025 J jnl
ISARA: An Island-Style Systolic Array Reconfigurable Accelerator Based on Memristors for Deep Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst.
Fan Yang, Nan Li, Letian Wang, Pinfeng Jiang, Xiangshui Miao, Xingsheng Wang
2025 — conf
Multi-Level RTN with Certain Regularities in Oxide-RRAM: Experiments, Defect Dynamics and 3D Multi-Physics Modeling.
IRPS
Dejiang Mu, Pan Liu, Zijian Zhou, Zifei Cai, Jian Zhang, Kanhao Xue, Zhigang Ji, Xiangshui Miao, Xingsheng Wang
2025 J jnl
Optimizing hardware-software co-design based on non-ideality in memristor crossbars for in-memory computing.
Sci. China Inf. Sci.
Pinfeng Jiang, Danzhe Song, Menghua Huang, Fan Yang, Letian Wang, Pan Liu, Xiangshui Miao, Xingsheng Wang
2025 C conf
ReBA: A Hybrid Sparse Reconfigurable Butterfly Accelerator for Solving Partial Differential Equations via Hardware and Algorithm Co-Design.
ISCAS
Pinfeng Jiang, Letian Wang, Yilong Fang, Yi Wang, Mingde Zhu, Xiangshui Miao, Xingsheng Wang
2025 A conf
SPARTA: Spike-Aware Token Skipping Co-Optimization with Heterogeneous ReRAM-CIM Architecture for Spiking Transformer Acceleration.
ICCAD
Pinfeng Jiang, Letian Wang, Yilong Fang, Yi Wang, Mingde Zhu, Xiangshui Miao, Xingsheng Wang
2024 — conf
Design Technology Co-Optimization for Memristor Self-Write Termination Circuits.
ICTA
Fan Yang, Nan Li, Juncheng Huang, Qingjie Wang, Xiangshui Miao, Xingsheng Wang
2024 J jnl
Efficient implementation of majority-inverter graph logic and arithmetic functions with memristor arrays.
Sci. China Inf. Sci.
Zhouchao Gan, Dongdong Zhang, Chenyu Zhang, Yinghao Ma, Xiangshui Miao, Xingsheng Wang
2024 A* conf
Multi-order Differential Neural Network for TCAD Simulation of the Semiconductor Devices.
DAC
Zifei Cai, Anaoxue Huang, Yifeng Xiong, Dejiang Mu, Xiangshui Miao, Xingsheng Wang
2024 J jnl
iPREFER: An Intelligent Parameter Extractor based on Features for BSIM-CMG Models.
CoRR
Zhiliang Peng, Yicheng Wang, Zhengwu Yuan, Xingsheng Wang
2023 J jnl
A comprehensive study of device variability of sub-5 nm nanosheet transistors and interplay with quantum confinement variation.
Sci. China Inf. Sci.
Haowen Luo, Ruihan Li, Xiangshui Miao, Xingsheng Wang
2023 — conf
Invited Paper: A Memristor-Based Stateful Majority-Inverter Graph Logic and 1-Bit Full Adder for In-Memory Computing Systems.
ICTA
Zhouchao Gan, Dongdong Zhang, Yinghao Ma, Chenyu Zhang, Xiangshui Miao, Xingsheng Wang
2023 J jnl
Modeling and physical mechanism analysis of the effect of a polycrystalline-ferroelectric gate on FE-FinFETs.
Sci. China Inf. Sci.
Chengxu Wang, Hao Yu, Yichen Wang, Zichong Zhang, Xiangshui Miao, Xingsheng Wang
2020 — conf
A TCAD-based Study of NDR Effect in NC-FinFET.
ICTA
Hao Yu, Chengxu Wang, Xiangshui Miao, Xingsheng Wang
2020 — conf
Electrostatic Characteristics Analysis of Ferroelectric Tunneling Junctions with Different Structures.
ICTA
Chengxu Wang, Hao Yu, Xiangshui Miao, Xingsheng Wang
2019 J jnl
A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond.
CoRR
Qiang Huo, Zhenhua Wu, Weixing Huang, Xingsheng Wang, Geyu Tang, Jiaxin Yao, Yongpan Liu, Feng Zhang, Ling Li, Ming Liu
2016 — conf
Nanowire transistor solutions for 5nm and beyond.
ISQED
A. Asenov, Yangang Wang, Binjie Cheng, Xingsheng Wang, Plamen Asenov, Talib Al-Ameri, Vihar P. Georgiev
2014 — conf
Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability.
ESSDERC
Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Asen Asenov
2013 — conf
Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability.
ESSDERC
Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Jente B. Kuang, Sani R. Nassif, Asen Asenov
2013 C conf
SRAM device and cell co-design considerations in a 14nm SOI FinFET technology.
ISCAS
Binjie Cheng, Xingsheng Wang, Andrew R. Brown, Jente B. Kuang, Dave Reid, Campbell Millar, Sani R. Nassif, Asen Asenov
2013 J jnl
Statistical Variability and Reliability and the Impact on Corresponding 6T-SRAM Cell Design for a 14-nm Node SOI FinFET Technology.
IEEE Des. Test
Xingsheng Wang, Binjie Cheng, Jente B. Kuang, Andrew R. Brown, Campbell Millar, Asen Asenov
2012 — conf
Statistical variability in 14-nm node SOI FinFETs and its impact on corresponding 6T-SRAM cell design.
ESSDERC
Xingsheng Wang, Binjie Cheng, Andrew R. Brown, Campbell Millar, Asen Asenov
2011 C conf
New reliability mechanisms in memory design for sub-22nm technologies.
IOLTS
Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber
2010 A conf
Capturing intrinsic parameter fluctuations using the PSP compact model.
DATE
Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov
2010 J jnl
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP.
IEEE Des. Test Comput.
Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov