Xing Huang

64 papers A* 3A 8B 2C 2Misc 1Journal 37Unranked 11
YearRankTypeTitle / Venue / Authors
2026 J jnl
Adaptive Control-Logic Routing with Length Matching and Fault Tolerance for FPVA Biochips Using Deep Reinforcement Learning.
ACM Trans. Design Autom. Electr. Syst.
Huayang Cai, Genggeng Liu, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang
2026 J jnl
Design Automation Techniques for Microfluidic Fully Programmable Valve Array Biochips: A Systematic Survey.
ACM Trans. Design Autom. Electr. Syst.
Shuang Qi, Zhiwen Yu, Bin Guo, Sizhao Li, Zipeng Li, Hanbin Ma, Tsung-Yi Ho, Krishnendu Chakrabarty, Xing Huang
2026 J jnl
Path-Driven Washing and Drying Co-Optimization in Continuous-Flow Lab-on-Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Hanbin Ma, Tsung-Yi Ho, Ulf Schlichtmann, Krishnendu Chakrabarty
2025 J jnl
A Unified Deep Reinforcement Learning Approach for Constructing Rectilinear and Octilinear Steiner Minimum Tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhenkun Lin, Genggeng Liu, Xing Huang, Yibo Lin, Jixin Zhang, Wen-Hao Liu, Ting-Chi Wang
2025 — conf
Application Mapping Method based on Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips.
ACM Great Lakes Symposium on VLSI
Hongjin Su, Zhisheng Chen, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang
2025 J jnl
FTCD: Fault-Tolerant Co-Design of Flow and Control Layers for Fully Programmable Valve Array Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yuhan Zhu, Genggeng Liu, Wenzhong Guo, Xing Huang
2025 J jnl
Hierarchical Partitioning-Based Interchip Redistribution Layer Routing for Fan-Out Wafer-Level Packaging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haoyang Xu, Xing Huang, Zhen Zhuang, Zhiwen Yu, Bin Guo, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong
2025 A* conf
Late Breaking Results: An Efficient and Scalable Track Assignment with GPU Parallelism.
DAC
Genggeng Liu, Pengcheng Huang, Zepeng Li, Wen-Hao Liu, Xing Huang, Wenzhong Guo
2025 J jnl
Multi-layer obstacle-avoiding rectilinear steiner minimal tree algorithm based on deep reinforcement learning.
J. King Saud Univ. Comput. Inf. Sci.
Xing Huang, Yuhan Zhu, Yanbo Xu, Yajun Xie, Genggeng Liu
2025 J jnl
SDCLR: Scalable Dual Control-Layer Routing for continuous-flow microfluidic biochips with minimized control ports.
Integr.
Zhisheng Chen, Hongjin Su, Bohan Dong, Genggeng Liu, Xing Huang
2025 J jnl
SPTA 2.0: Enhanced Scalable Parallel Track Assignment Algorithm with Two-Stage Partition Considering Timing Delay.
ACM Trans. Design Autom. Electr. Syst.
Huayang Cai, Pengcheng Huang, Genggeng Liu, Xing Huang, Yidan Jing, Wenhao Liu, Ting-Chi Wang
2025 — conf
Timing-Driven Application Mapping for Continuous-Flow Microfluidic Biochips.
ACM Great Lakes Symposium on VLSI
Xinyue Jiao, Youlin Pan, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang
2024 J jnl
A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization.
IEEE Trans. Syst. Man Cybern. Syst.
Genggeng Liu, Yuhan Zhu, Zhen Zhuang, Zhenyu Pei, Min Gan, Xing Huang, Wenzhong Guo
2024 B conf
Adaptive Control-Logic Routing for Fully Programmable Valve Array Biochips Using Deep Reinforcement Learning.
ASPDAC
Huayang Cai, Genggeng Liu, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang
2024 — conf
Anomaly Detection Method based on Discrete Particle Swarm Optimization for Continuous-Flow Microfluidic Biochips.
ACM Great Lakes Symposium on VLSI
Yangjie Wu, Yuhan Zhu, Genggeng Liu, Xing Huang
2024 J jnl
Capacity-Aware Wash Optimization with Dynamic Fluid Scheduling and Channel Storage for Continuous-Flow Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst.
Zhisheng Chen, Xu Hu, Wenzhong Guo, Genggeng Liu, Jiaxuan Wang, Tsung-Yi Ho, Xing Huang
2024 J jnl
Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Huayang Cai, Wenzhong Guo, Genggeng Liu, Tsung-Yi Ho, Krishnendu Chakrabarty, Ulf Schlichtmann
2024 — conf
Error Recovery Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips.
ACM Great Lakes Symposium on VLSI
Zhenyuan Wu, Yuhan Zhu, Xing Huang, Genggeng Liu
2024 J jnl
NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Youlin Pan, Genggeng Liu, Xing Huang, Zipeng Li, Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Chang-Jin Kim, Tsung-Yi Ho
2024 A conf
PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems.
DATE
Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Tsung-Yi Ho, Ulf Schlichtmann, Krishnendu Chakrabarty
2024 J jnl
Physical design for microfluidic biochips considering actual volume management and channel storage.
Integr.
Genggeng Liu, Zhengyang Chen, Zhisheng Chen, Bowen Liu, Yu Zhang, Xing Huang
2024 — conf
Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips.
ISQED
Zhengyang Ye, Zhisheng Chen, Youlin Pan, Genggeng Liu, Wenzhong Guo, Tsung-Yi Ho, Xing Huang
2024 J jnl
Timing-Driven Obstacle-Avoiding X-Architecture Steiner Minimum Tree Algorithm With Slack Constraints.
IEEE Trans. Syst. Man Cybern. Syst.
Yuhan Zhu, Genggeng Liu, Ren Lu, Xing Huang, Min Gan, Wenzhong Guo
2024 B conf
Towards Automated Testing of Multiplexers in Fully Programmable Valve Array Biochips.
ASPDAC
Genggeng Liu, Yuqin Zeng, Yuhan Zhu, Huayang Cai, Wenzhong Guo, Zipeng Li, Tsung-Yi Ho, Xing Huang
2024 — conf
Washing Optimization Method Based on Deep Reinforcement Learning for Fully Programmable Valve Array Biochips.
ACM Great Lakes Symposium on VLSI
Junqian Huang, Yuhan Zhu, Xing Huang, Genggeng Liu
2023 J jnl
Application Mapping and Control-system Design for Microfluidic Biochips with Distributed Channel Storage.
ACM Trans. Design Autom. Electr. Syst.
Zhisheng Chen, Wenzhong Guo, Genggeng Liu, Xing Huang
2023 J jnl
Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Lu Wang, Qingshan Li, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann
2023 J jnl
Enhanced Built-In Self-Diagnosis and Self-Repair Techniques for Daisy-Chain Design in MEDA Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ling Zhang, Zipeng Li, Xing Huang, Krishnendu Chakrabarty
2023 A* conf
Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips.
DAC
Genggeng Liu, Yuhan Zhu, Wenzhong Guo, Xing Huang
2022 J jnl
A Survey on Security of Digital Microfluidic Biochips: Technology, Attack, and Defense.
ACM Trans. Design Autom. Electr. Syst.
Wenzhong Guo, Sihuang Lian, Chen Dong, Zhenyi Chen, Xing Huang
2022 J jnl
Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems.
ACM Comput. Surv.
Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Krishnendu Chakrabarty, Ulf Schlichtmann
2022 J jnl
Contamination-Aware Synthesis for Programmable Microfluidic Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hui-Chieh Yu, Yu-Huei Lin, Zhiyang Chen, Bing Li, Xing Huang, Ulf Schlichtmann, Tsung-Yi Ho, Hailong Yao
2022 J jnl
Design automation for continuous-flow microfluidic biochips: A comprehensive review.
Integr.
Genggeng Liu, Hongbin Huang, Zhisheng Chen, Hongxing Lin, Hui Liu, Xing Huang, Wenzhong Guo
2022 J jnl
Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash Optimization.
IEEE Trans. Computers
Xing Huang, Wenzhong Guo, Zhisheng Chen, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann
2022 C conf
LA-SVR: A High-Performance Layer Assignment Algorithm with Slew Violations Reduction.
VLSI-SoC
Lieqiu Jiang, Zepeng Li, Chenpeng Bao, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang
2022 J jnl
MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Tsung-Yi Ho, Zepeng Li, Genggeng Liu, Lu Wang, Qingshan Li, Wenzhong Guo, Bing Li, Ulf Schlichtmann
2022 — conf
NR-Router: Non-Regular Electrode Routing with Optimal Pin Selection for Electrowetting-on-Dielectric Chips.
ASP-DAC
Hsin-Chuan Huang, Chi-Chun Liang, Qining Wang, Xing Huang, Tsung-Yi Ho, Chang-Jin Kim
2022 J jnl
PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann
2022 C conf
SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition.
VLSI-SoC
Yidan Jing, Liliang Yang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang
2022 J jnl
Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Genggeng Liu, Xinghai Zhang, Wenzhong Guo, Xing Huang, Wen-Hao Liu, Kai-Yuan Chao, Ting-Chi Wang
2022 J jnl
VirtualSync+: Timing Optimization With Virtual Synchronization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann
2022 J jnl
VirtualSync+: Timing Optimization with Virtual Synchronization.
CoRR
Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann
2021 A conf
ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification.
DATE
Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, Wen-Hao Liu
2021 A conf
An Efficient Programming Framework for Memristor-based Neuromorphic Computing.
DATE
Grace Li Zhang, Bing Li, Xing Huang, Chen Shen, Shuhang Zhang, Florin Burcea, Helmut Graeb, Tsung-Yi Ho, Hai Li, Ulf Schlichtmann
2021 A conf
BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems.
ICCAD
Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann
2021 J jnl
DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chunfeng Liu, Xing Huang, Bing Li, Hailong Yao, Paul Pop, Tsung-Yi Ho, Ulf Schlichtmann
2020 — conf
A Survey of DMFBs Security: State-of-the-Art Attack and Defense.
ISQED
Chen Dong, Lingqing Liu, Huangda Liu, Wenzhong Guo, Xing Huang, Sihuang Lian, Ximeng Liu, Tsung-Yi Ho
2020 — conf
HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing Systems.
ACM Great Lakes Symposium on VLSI
Guorong He, Chen Dong, Xing Huang, Wenzhong Guo, Ximeng Liu, Tsung-Yi Ho
2020 — conf
MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique.
ACM Great Lakes Symposium on VLSI
Zhen Zhuang, Genggeng Liu, Xing Huang, Xiaotao Jia, Wen-Hao Liu, Wenzhong Guo
2020 A conf
MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes.
DATE
Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang
2020 J jnl
Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Zhu, Xing Huang, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann
2020 A conf
PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips.
ICCAD
Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann
2020 J jnl
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xing Huang, Tsung-Yi Ho, Krishnendu Chakrabarty, Wenzhong Guo
2019 J jnl
A Locating Method for Multi-Purposes HTs Based on the Boundary Network.
IEEE Access
Chen Dong, Fan Zhang, Ximeng Liu, Xing Huang, Wenzhong Guo, Yang Yang
2019 A* conf
MiniControl: Synthesis of Continuous-Flow Microfluidics with Strictly Constrained Control Ports.
DAC
Xing Huang, Tsung-Yi Ho, Wenzhong Guo, Bing Li, Ulf Schlichtmann
2019 A conf
Open-Source Incubation Ecosystem for Digital Microfluidics - Status and Roadmap: Invited Paper.
ICCAD
Xing Huang, Chi-Chun Liang, Jia Li, Tsung-Yi Ho, Chang-Jin Kim
2019 A conf
Physical Synthesis of Flow-Based Microfluidic Biochips Considering Distributed Channel Storage.
DATE
Zhisheng Chen, Xing Huang, Wenzhong Guo, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann
2017 J jnl
MLXR: multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing.
Sci. China Inf. Sci.
Xing Huang, Wenzhong Guo, Genggeng Liu, Guolong Chen
2016 J jnl
FH-OAOS: A Fast Four-Step Heuristic for Obstacle-Avoiding Octilinear Steiner Tree Construction.
ACM Trans. Design Autom. Electr. Syst.
Xing Huang, Wenzhong Guo, Genggeng Liu, Guolong Chen
2015 J jnl
A PSO-based timing-driven Octilinear Steiner tree algorithm for VLSI routing considering bend reduction.
Soft Comput.
Genggeng Liu, Wenzhong Guo, Yuzhen Niu, Guolong Chen, Xing Huang
2015 — conf
Fast obstacle-avoiding octilinear steiner minimal tree construction algorithm for VLSI design.
ISQED
Xing Huang, Wenzhong Guo, Guolong Chen
2015 J jnl
Multilayer Obstacle-Avoiding X-Architecture Steiner Minimal Tree Construction Based on Particle Swarm Optimization.
IEEE Trans. Cybern.
Genggeng Liu, Xing Huang, Wenzhong Guo, Yuzhen Niu, Guolong Chen
2015 J jnl
Obstacle-Avoiding Algorithm in X-Architecture Based on Discrete Particle Swarm Optimization for VLSI Design.
ACM Trans. Design Autom. Electr. Syst.
Xing Huang, Genggeng Liu, Wenzhong Guo, Yuzhen Niu, Guolong Chen
2013 Misc conf
Obstacle-Avoiding Octagonal Steiner Tree construction based on Particle Swarm Optimization.
ICNC
Xing Huang, Genggeng Liu, Wenzhong Guo, Guolong Chen