Xin Zhang - RankMe

78 papers A* 5A 2C 3Misc 1Journal 37Unranked 30

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Design of a Wide-Loading-Range Cap-Less LDO With Enhanced Power Supply Rejection and Speed. IEEE Trans. Circuits Syst. I Regul. Pap. Kejia Wang, Junyao Tang, Si Yuan Sim, Xin Zhang, Cheng Huang
2026	—	`conf`	Proactive Power Management-Based Supply Regulation with Online Learning for Variation-Tolerant Workload-Aware Droop Mitigation in 28nm CMOS. ISSCC Xi Chen, Andrew Liss, William Covington, Qiankai Cao, Yiqi Li, Kang Wei, Raveesh Magod, Muhammad Khellah, Xin Zhang, Jie Gu
2026	J	`jnl`	Steady-State and Small-Signal Analysis of High-Ratio Hybrid Buck Converters With Enhancement to State-Space-Averaging Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. Muhammad Rizwan Khan, Xun Liu, Xin Zhang, Cheng Huang
2026	J	`jnl`	Towards Generalizable and Efficient Circuit Topology Design: A Graph-Transformer-based Surrogate Model with Curriculum Learning. ACM Trans. Design Autom. Electr. Syst. Haoshu Lu, Shaoze Fan, Shun Zhang, Ningyuan Cao, Xin Zhang, Jing Li
2025	—	`conf`	9.6 A 6.78MHz Single-Stage Regulating Rectifier with Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131mW Output Power. ISSCC Quanrong Zhuang, Junyi Sun, Bo Li, Jie Lu, Xin Zhang, Yi Shi, Hao Qiu
2025	Misc	`conf`	A 14-nm Energy-Efficient and Reconfigurable Analog Current-Domain In-Memory Compute SRAM Accelerator. VLSID Aya G. Amer, Maitreyi Ashok, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2025	J	`jnl`	A 65-nm Proactive Power Management Technique With Real-Time Machine Learning Engine for Droop Prediction and Mitigation on Microprocessors. IEEE J. Solid State Circuits Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2025	—	`conf`	A 93.9% Peak Efficiency 3V-to-40V-Input GaN-based DC-DC Converter with Unified Reliability and Efficiency Adaptive Control. CICC Zhaoqing Wang, Yichen Xu, Suhwan Kim, Nachiket V. Desai, Minxiang Gong, Ram Krishnamurthy, Xin Zhang, Mingoo Seok
2025	—	`conf`	A Multi-Level Power Management Architecture for Battery-Powered SPAD Drivers with Supply Intrinsic Quenching and 10-ns Dead Time. CICC Wenshuo Zhu, Xuan Sun, Xin Zhang, Cheng Huang
2025	A*	`conf`	AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation. ICML Prashanth Vijayaraghavan, Luyao Shi, Ehsan Degan, Vandana V. Mukherjee, Xin Zhang
2025	J	`jnl`	AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation. CoRR Prashanth Vijayaraghavan, Luyao Shi, Ehsan Degan, Vandana V. Mukherjee, Xin Zhang
2025	J	`jnl`	Digital In-Memory Compute for Machine Learning Applications With Input and Model Security. IEEE J. Solid State Circuits Maitreyi Ashok, Saurav Maji, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2025	J	`jnl`	Digital Low-Dropout Regulator-Assisted Buck DC-DC Converter Achieving 68-mV Droop Voltage and 95.5% Efficiency. IEEE Solid State Circuits Lett. Yichen Xu, Zhaoqing Wang, Rentao Wan, Suhwan Kim, Minxiang Gong, Ram Krishnamurthy, Xin Zhang, Mingoo Seok
2025	J	`jnl`	Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement With Minimal Data Input. IEEE Trans. Circuits Syst. I Regul. Pap. Dimple Vijay Kochar, Maitreyi Ashok, John Cohn, Xin Zhang, Anantha P. Chandrakasan
2025	C	`conf`	Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement with Minimal Data Input. ISCAS Dimple Vijay Kochar, Maitreyi Ashok, John Cohn, Anantha P. Chandrakasan, Xin Zhang
2025	J	`jnl`	Enhancing Reasoning to Adapt Large Language Models for Domain-Specific Applications. CoRR Bo Wen, Xin Zhang
2025	J	`jnl`	FlexDCIM: A 400 MHz 249.1 TOPS/W 64 Kb Flexible Digital Compute-in-Memory SRAM Macro for CNN Acceleration. IEEE Trans. Circuits Syst. I Regul. Pap. Vishal Sharma, Xin Zhang, Narendra Singh Dhakad, Tony Tae-Hyoung Kim
2025	A*	`conf`	LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation. ICML Chen-Chia Chang, Wan-Hsuan Lin, Yikang Shen, Yiran Chen, Xin Zhang
2025	J	`jnl`	LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation. CoRR Chen-Chia Chang, Wan-Hsuan Lin, Yikang Shen, Yiran Chen, Xin Zhang
2025	J	`jnl`	Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC. IEEE J. Solid State Circuits Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Röwer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang
2025	J	`jnl`	SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor for IoT Devices. IEEE J. Solid State Circuits Yuncheng Lu, Xin Zhang, Bo Wang, Tony Tae-Hyoung Kim
2025	J	`jnl`	Semiconductor SEM Image Defect Classification Using Supervised and Semi-Supervised Learning with Vision Transformers. CoRR Chien-Fu Huang, Katherine Sieg, Leonid Karlinksy, Nash Flores, Rebekah Sheraw, Xin Zhang
2024	—	`conf`	14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC. ISSCC Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang
2024	C	`conf`	A 24/48V to 0.8V-1.2V All-Digital Synchronous Buck Converter with Package-Integrated GaN power FETs and 180nm Silicon Controller IC. ISCAS Kaushik Bhattacharyya, Minxiang Gong, Muya Chang, Xin Zhang, Arijit Raychowdhury
2024	J	`jnl`	A 96.1% Efficiency Single-Inductor Multiple-Output (SIMO) Buck Converter With 2.1-A/ns Transient Speed and 2.2-A Maximum Current Capacity. IEEE J. Solid State Circuits Lei Zhao, Junyao Tang, Xin Zhang, Kang Wei, Raveesh Magod, Cheng Huang
2024	—	`conf`	A Monolithic 3-Level Single-Inductor Multiple-Output Buck Converter with State-Based Non-Linear Control Capable of Handling 1A/1.5ns Transient with On-Die LC. CICC Junyao Tang, Jianqiang Jiang, Lei Zhao, Xin Zhang, Kang Wei, Cheng Huang
2024	—	`conf`	A Secure Digital In-Memory Compute (IMC) Macro with Protections for Side-Channel and Bus Probing Attacks. CICC Maitreyi Ashok, Saurav Maji, Xin Zhang, John Cohn, Anantha P. Chandrakasan
2024	J	`jnl`	A Ten-Level Series-Capacitor 24-to-1-V DC-DC Converter With Fast In Situ Efficiency Tracking, Power-FET Code Roaming, and Switch Node Power Rail. IEEE J. Solid State Circuits Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Xin Zhang, Mingoo Seok
2024	J	`jnl`	CIRCUITSYNTH: Leveraging Large Language Models for Circuit Topology Synthesis. CoRR Prashanth Vijayaraghavan, Luyao Shi, Ehsan Degan, Xin Zhang
2024	A*	`conf`	Graph-Transformer-based Surrogate Model for Accelerated Converter Circuit Topology Design. DAC Shaoze Fan, Haoshu Lu, Shun Zhang, Ningyuan Cao, Xin Zhang, Jing Li
2024	J	`jnl`	LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits. CoRR Dimple Vijay Kochar, Hanrui Wang, Anantha Chandrakasan, Xin Zhang
2024	A*	`conf`	LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. ICML Chen-Chia Chang, Yikang Shen, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang
2024	J	`jnl`	LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. CoRR Chen-Chia Chang, Yikang Shan, Shaoze Fan, Jing Li, Shun Zhang, Ningyuan Cao, Yiran Chen, Xin Zhang
2023	—	`conf`	93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code Roaming. ESSCIRC Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Orlando Lazaro, Andres A. Blanco, Xin Zhang, Mingoo Seok
2023	—	`conf`	A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs. A-SSCC Xin Zhang, Vishal Sharma, Yuncheng Lu, Yong-Jun Jo, Tony Tae-Hyoung Kim
2023	—	`conf`	A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking. CICC Xi Chen, Aly Shoukry, Tianyu Jia, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2023	J	`jnl`	A 90.4% Peak Efficiency 48-to-1-V GaN/Si Hybrid Converter With Three-Level Hybrid Dickson Topology and Gradient Descent Run-Time Optimizer. IEEE J. Solid State Circuits Minxiang Gong, Hua Chen, Xin Zhang, Rinkle Jain, Arijit Raychowdhury
2023	J	`jnl`	A Digital Bit-Reconfigurable Versatile Compute-In-Memory Macro for Machine Learning Acceleration. IEEE Trans. Circuits Syst. II Express Briefs Xin Zhang, Yuncheng Lu, Bo Wang, Tony Tae-Hyoung Kim
2023	C	`conf`	A Single-Inductor 4-Phase Hybrid Switched-Capacitor Topology for Integrated 48V-to-1V DC-DC Converters. ISCAS Muhammad Rizwan Khan, Kang Wei, Xin Zhang, Cheng Huang
2023	—	`conf`	A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS. VLSI Technology and Circuits Ankur Agrawal, Monodeep Kar, Kyu-Hyoun Kim, Sergey V. Rylov, Jinwook Jung, Seiji Munetoh, Kohji Hosokawa, Xin Zhang, Bahman Hekmatshoartabari, Fabio Carta, Martin Cochet, Robert Casatuta, Mingu Kang, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang
2023	J	`jnl`	Power Converter Circuit Design Automation Using Parallel Monte Carlo Tree Search. ACM Trans. Design Autom. Electr. Syst. Shaoze Fan, Shun Zhang, Jianbo Liu, Ningyuan Cao, Xiaoxiao Guo, Jing Li, Xin Zhang
2023	—	`conf`	Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs. VLSI Technology and Circuits Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2023	—	`conf`	SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor with Computing-In-Memory and Dead Neuron Pruning. A-SSCC Yuncheng Lu, Xin Zhang, Zehao Li, Bo Wang, Tony Tae-Hyoung Kim
2022	—	`conf`	A 181µW Real-Time 3-D Hand-Gesture Recognition System for Edge Applications. AICAS Yuncheng Lu, Zehao Li, Xin Zhang, Tony Tae-Hyoung Kim
2022	J	`jnl`	A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling. IEEE J. Solid State Circuits Sae Kyu Lee, Ankur Agrawal, Joel Silberman, Matthew M. Ziegler, Mingu Kang, Swagath Venkataramani, Nianzheng Cao, Bruce M. Fleischer, Michael Guillorn, Matthew Cohen, Silvia M. Mueller, Jinwook Oh, Martin Lutz, Jinwook Jung, Siyu Koswatta, Ching Zhou, Vidhi Zalani, Monodeep Kar, James Bonanno, Robert Casatuta, Chia-Yu Chen, Jungwook Choi, Howard Haynie, Alyssa Herbert, Radhika Jain, Kyu-Hyoun Kim, Yulong Li, Zhibin Ren, Scot Rider, Marcel Schaal, Kerstin Schelm, Michael Scheuermann, Xiao Sun, Hung Tran, Naigang Wang, Wei Wang, Xin Zhang, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang
2022	—	`conf`	A 90.4% Peak Efficiency 48V/1V Three-Level Hybrid Dickson Converter with Gradient Descent Run-Time Optimizer and GaN/Si Hybrid Conversion. VLSI Technology and Circuits Minxiang Gong, Xin Zhang, Arijit Raychowdhury
2022	—	`conf`	A Low-Power Gesture Recognition System utilizing Hybrid Tiny Classifiers. ISOCC Yuncheng Lu, Zehao Li, Xin Zhang, Tony Tae-Hyoung Kim
2021	—	`conf`	A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling. ISSCC Ankur Agrawal, Sae Kyu Lee, Joel Silberman, Matthew M. Ziegler, Mingu Kang, Swagath Venkataramani, Nianzheng Cao, Bruce M. Fleischer, Michael Guillorn, Matt Cohen, Silvia M. Mueller, Jinwook Oh, Martin Lutz, Jinwook Jung, Siyu Koswatta, Ching Zhou, Vidhi Zalani, James Bonanno, Robert Casatuta, Chia-Yu Chen, Jungwook Choi, Howard Haynie, Alyssa Herbert, Radhika Jain, Monodeep Kar, Kyu-Hyoun Kim, Yulong Li, Zhibin Ren, Scot Rider, Marcel Schaal, Kerstin Schelm, Michael Scheuermann, Xiao Sun, Hung Tran, Naigang Wang, Wei Wang, Xin Zhang, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Leland Chang, Kailash Gopalakrishnan
2021	J	`jnl`	A Survey on the Optimization of Neural Network Accelerators for Micro-AI On-Device Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. Arnab Neelim Mazumder, Jian Meng, Hasib-Al Rashid, Utteja Kallakuri, Xin Zhang, Jae-sun Seo, Tinoosh Mohsenin
2021	A	`conf`	From Specification to Topology: Automatic Power Converter Design via Reinforcement Learning. ICCAD Shaoze Fan, Ningyuan Cao, Shun Zhang, Jing Li, Xiaoxiao Guo, Xin Zhang
2021	J	`jnl`	Guest Editorial Cross-Layer Designs, Methodologies, and Systems to Enable Micro AI for On-Device Intelligence. IEEE J. Emerg. Sel. Topics Circuits Syst. Tinoosh Mohsenin, Inna Partin-Vaisband, Houman Homayoun, Jae-sun Seo, Xin Zhang
2021	A*	`conf`	RaPiD: AI Accelerator for Ultra-low Precision Training and Inference. ISCA Swagath Venkataramani, Vijayalakshmi Srinivasan, Wei Wang, Sanchari Sen, Jintao Zhang, Ankur Agrawal, Monodeep Kar, Shubham Jain, Alberto Mannari, Hoang Tran, Yulong Li, Eri Ogawa, Kazuaki Ishizaki, Hiroshi Inoue, Marcel Schaal, Mauricio J. Serrano, Jungwook Choi, Xiao Sun, Naigang Wang, Chia-Yu Chen, Allison Allain, James Bonanno, Nianzheng Cao, Robert Casatuta, Matthew Cohen, Bruce M. Fleischer, Michael Guillorn, Howard Haynie, Jinwook Jung, Mingu Kang, Kyu-Hyoun Kim, Siyu Koswatta, Sae Kyu Lee, Martin Lutz, Silvia M. Mueller, Jinwook Oh, Ashish Ranjan, Zhibin Ren, Scot Rider, Kerstin Schelm, Michael Scheuermann, Joel Silberman, Jie Yang, Vidhi Zalani, Xin Zhang, Ching Zhou, Matthew M. Ziegler, Vinay Shah, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Leland Chang, Kailash Gopalakrishnan
2020	—	`conf`	Non-isolated 48V-to-1V Heterogeneous Integrated Voltage Converters for High Performance Computing in Data Centers. MWSCAS Minxiang Gong, Xin Zhang, Arijit Raychowdhury
2019	—	`conf`	A 48 V Input 0.75 V Output DC-DC Converter Power Block for HPC Systems and Datacenters (invited paper). VLSI Circuits Todd Takken, Andrew Ferencz, Chung-Shiang Wu, Liam McAuliffe, Tianyu Jia, Xin Zhang
2019	J	`jnl`	Research From the IEEE IBM AI Compute and Emerging Technology Symposia. IEEE J. Emerg. Sel. Topics Circuits Syst. Matthew M. Ziegler, Krishnan Kailas, Xin Zhang, Rajiv V. Joshi
2015	J	`jnl`	An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage. IEEE Trans. Circuits Syst. I Regul. Pap. Jun Zhou, Chao Wang, Xin Liu, Xin Zhang, Minkyu Je
2015	J	`jnl`	An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. IEEE Trans. Circuits Syst. II Express Briefs Xin Liu, Jun Zhou, Chao Wang, Kah-Hyong Chang, Jianwen Luo, Jingjing Lan, Lei Liao, Yat-Hei Lam, Yongkui Yang, Bo Wang, Xin Zhang, Wang Ling Goh, Tony Tae-Hyoung Kim, Minkyu Je
2015	—	`conf`	Energy harvesting techniques: Energy sources, power management and conversion. ECCTD Philex Ming-Yan Fan, Oi-Ying Wong, Ming-Jie Chung, Tze-Yun Su, Xin Zhang, Po-Hung Chen
2014	—	`conf`	30.7 A 60Mb/s wideband BCC transceiver with 150pJ/b RX and 31pJ/b TX for emerging wearable applications. ISSCC Junghyup Lee, Vishal Vinayak Kulkarni, Ho Chee Keong, Jia Hao Cheong, Peng Li, Jun Zhou, Wei-Da Toh, Xin Zhang, Yuan Gao, Kuang-Wei Cheng, Xin Liu, Minkyu Je
2014	J	`jnl`	A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS. IEEE J. Solid State Circuits Xin Zhang, Po-Hung Chen, Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2013	—	`conf`	A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS. ASP-DAC Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012	—	`conf`	A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90% efficiency in load range from 2µW to 50µW. VLSIC Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012	J	`jnl`	A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation. IEEE Trans. Circuits Syst. II Express Briefs Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2012	—	`conf`	A 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester. ASP-DAC Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2012	J	`jnl`	An 80 mV Startup Dual-Mode Boost Converter by Charge-Pumped Pulse Generator and Threshold Voltage Tuned Oscillator With Hot Carrier Injection. IEEE J. Solid State Circuits Po-Hung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2012	J	`jnl`	On-Chip Measurement System for Within-Die Delay Variation of Individual Standard Cells in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Xin Zhang, Koichi Ishida, Hiroshi Fuketa, Makoto Takamiya, Takayasu Sakurai
2012	J	`jnl`	Startup Techniques for 95 mV Step-Up Converter by Capacitor Pass-On Scheme and V IEEE J. Solid State Circuits Po-Hung Chen, Koichi Ishida, Katsuyuki Ikeuchi, Xin Zhang, Kentaro Honda, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2011	J	`jnl`	0.18-V Input Charge Pump with Forward Body Bias to Startup Boost Converter for Energy Harvesting Applications. IEICE Trans. Electron. Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2011	J	`jnl`	0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS. IEICE Trans. Electron. Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai
2011	—	`conf`	A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting. A-SSCC Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2011	—	`conf`	A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme. ISSCC Po-Hung Chen, Koichi Ishida, Katsuyuki Ikeuchi, Xin Zhang, Kentaro Honda, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2011	J	`jnl`	A Variable Output Voltage Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction at Low Output Voltage. IEICE Trans. Electron. Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Takayasu Sakurai, Makoto Takamiya
2011	—	`conf`	An on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS. ASP-DAC Xin Zhang, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai
2011	J	`jnl`	Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits. IEEE Trans. Circuits Syst. II Express Briefs Yu Pu, Xin Zhang, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai
2010	—	`conf`	0.18-V input charge pump with forward body biasing in startup circuit using 65nm CMOS. CICC Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuaki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2010	—	`conf`	0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS. CICC Yasuyuki Okuma, Koichi Ishida, Yoshikatsu Ryu, Xin Zhang, Po-Hung Chen, Kazunori Watanabe, Makoto Takamiya, Takayasu Sakurai
2010	A	`conf`	Misleading energy and performance claims in sub/near threshold digital systems. ICCAD Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano, Makoto Takamiya, Takayasu Sakurai
2006	—	`conf`	A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs. APCCAS Xin Zhang, Dunshan Yu, Shimin Sheng