Xin Chen

32 papers B 1Misc 1Journal 23Unranked 7
YearRankTypeTitle / Venue / Authors
2025 — conf
FPGA-Based Implementation and Quantization of Convolutional Neural Networks.
CNML
Haozhen Jia, Xin Chen, Daxing Dong
2024 J jnl
Double-Node-Upset Self-Recoverable Latch Design for Wide Voltage Range Application.
IEEE Trans. Circuits Syst. II Express Briefs
Yuxin Bai, Xin Chen, Xinjie Zhou, Yanan Yin, Ying Zhang
2024 J jnl
Low-Overhead Triple-Node-Upset Self-Recoverable Latch Design for Ultra-Dynamic Voltage Scaling Application.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xin Chen, Yuxin Bai, Hao Cai, Congyi Zhu, Xinjie Zhou, Ying Zhang, Weiqiang Liu
2023 J jnl
FPGA Design of Blind Zone-Suppressed Phase Frequency Detector via Reset Mask and Edge Recovery Operations.
Circuits Syst. Signal Process.
Xin Chen, Yuxin Bai, Xiaoyu Liu, Ying Zhang
2023 — conf
FPGA-Based Cross-Hardware MBU Emulation Platform for Layout-Level Digital VLSI.
ATS
Xin Chen, Liangzhou Huo, Yudong Xie, Zhihao Shen, Zhiqiang Xiang, Changhao Gao, Ying Zhang
2023 J jnl
Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Xin Chen, Yuxin Bai, Jianpeng Cao, Lei Wang, Xinjie Zhou, Ying Zhang, Weiqiang Liu
2023 B conf
Spotlight: An Impairing Packet Transmission Attack Targeting Specific Node in NoC-based TCMP.
ETS
Jiaoyan Yao, Ying Zhang, Yifeng Hua, Yuanxiang Li, Jizhong Yang, Xin Chen
2023 J jnl
Trade-off Mechanism Between Reliability and Performance for Data-flow Soft Error Detection.
J. Electron. Test.
Zhenyu Zhao, Xin Chen, Yufan Lu
2022 J jnl
Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels.
IET Circuits Devices Syst.
Ying Zhang, Minghui Ge, Xin Chen, Jiaqi Yao, Zhiming Mao
2022 J jnl
Hybrid multi-level hardware Trojan detection platform for gate-level netlists based on XGBoost.
IET Comput. Digit. Tech.
Ying Zhang, Sen Li, Xin Chen, Jiaqi Yao, Zhiming Mao, Jizhong Yang, Yifeng Hua
2022 — conf
PUF-based Secure Test Wrapper Design for Network-on-Chip.
HOST
Ying Zhang, Yuanxiang Li, Xin Chen, Jizhong Yang, Yifeng Hua, Jiaoyan Yao
2021 J jnl
Efficient Anti-Glare Ceramic Decals Defect Detection by Incorporating Homomorphic Filtering.
Comput. Syst. Sci. Eng.
Xin Chen, Ying Zhang, Lang Lin, Junxiang Wang, Jiangqun Ni
2021 — conf
Hardware Trojans Detection Through RTL Features Extraction and Machine Learning.
AsianHOST
Jizhong Yang, Ying Zhang, Yifeng Hua, Jiaqi Yao, Zhiming Mao, Xin Chen
2021 J jnl
Z-domain modeling methodology for homodyne digital optical phase-locked loop.
IEICE Electron. Express
Xin Chen, Xiaoyu Liu, Ying Zhang, Yongxin Shan, Qiang Hu, Jun Li, Shiqi Lan
2020 Misc conf
A New Hardware Trojan Design: Distinguishing Between Trigger Inputs and Functional Inputs Is Difficult: Work-in-Progress.
CODES+ISSS
Minghui Ge, Ying Zhang, Sen Li, Jiaqi Yao, Zhiming Mao, Xin Chen
2019 — conf
Small Area High Speed Configurable FFT Processor.
ICICDT
Xiaoyu Zhang, Xin Chen, Ying Zhang
2018 J jnl
VLSI design of low-cost and high-precision fixed-point reconfigurable FFT processors.
IET Comput. Digit. Tech.
Hao Xiao, Xiang Yin, Ning Wu, Xin Chen, Jun Li, Xiaoxing Chen
2017 J jnl
FPGA based highly efficient MISTY1 architecture.
IEICE Electron. Express
Yasir Khizar, Ning Wu, Xin Chen, Muhammad Rehan Yahya, Xiaoqiang Zhang
2016 J jnl
A Modified Partial Product Generator for Redundant Binary Multipliers.
IEEE Trans. Computers
Xiao-Ping Cui, Weiqiang Liu, Xin Chen, Earl E. Swartzlander Jr., Fabrizio Lombardi
2016 — conf
A scalable multi-pipeline JPEG encoding architecture.
ICM
Shichao Yu, Zhizhong Hu, Xin Chen
2014 — conf
A New Redundant Binary Partial Product Generator for Fast 2n-Bit Multiplier Design.
CSE
Xiao-Ping Cui, Wei Hu, Xin Chen, Shumin Wang
2014 J jnl
An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform.
IEICE Electron. Express
Xiaoqiang Zhang, Ning Wu, Fang Zhou, Xin Chen
2014 J jnl
Built-in self test design of power switch with clock-gated charge/discharge transistor.
IET Comput. Digit. Tech.
Xin Chen, Ning Wu, Na Bai, Hui Huang, Wei Hu
2013 J jnl
A Design Methodology for Three-Dimensional Hybrid NoC-Bus Architecture.
IEICE Trans. Electron.
Lei Zhou, Ning Wu, Xin Chen
2013 J jnl
BIST design of power switch.
IEICE Electron. Express
Xin Chen, Ning Wu, Wei Hu, Weiwei Shan
2013 J jnl
Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware.
IEEE Trans. Instrum. Meas.
Weiwei Shan, Xin Chen, Bo Li, Peng Cao, Jie Li, Gugang Gao, Longxing Shi
2011 J jnl
A Fast Locking All-Digital Phase-Locked Loop via Feed-Forward Compensation Technique.
IEEE Trans. Very Large Scale Integr. Syst.
Xin Chen, Jun Yang, Longxing Shi
2011 J jnl
A Novel Combined Proportional-Derivative Control for Electrostatic MEMS Mirror Actuation.
IEICE Trans. Electron.
Weiwei Shan, Xin Chen
2010 J jnl
Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis.
IEICE Trans. Electron.
Zhe Zhang, Xin Chen, De-jun Qian, Chen Hu
2009 J jnl
A Harmonic-Free All Digital Delay-Locked Loop Using an Improved Fast-Locking Successive Approximation Register-Controlled Scheme.
IEICE Trans. Electron.
Kai Huang, Zhikuang Cai, Xin Chen, Longxing Shi
2009 J jnl
Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise.
IEICE Trans. Electron.
Xiaoying Deng, Xin Chen, Jun Yang, Jianhui Wu
2008 J jnl
A Novel Fast-Lock-in Digitally Controlled Phase-Locked Loop.
IEICE Trans. Electron.
Xin Chen, Jun Yang, Longxing Shi