Xifan Tang

48 papers A* 2A 7B 5C 4Journal 17Unranked 11
YearRankTypeTitle / Venue / Authors
2025 J jnl
ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction.
CoRR
Luca Collini, Jitendra Bhandari, Chiara Muscari Tomajoli, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
2025 J jnl
ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction.
ACM Trans. Design Autom. Electr. Syst.
Luca Collini, Jitendra Bhandari, Chiara Muscari Tomajoli, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
2025 B conf
GEF: A GNN-Based Evaluation Framework for FPGA Routing Architecture.
FPL
Yuanqi Wang, Yunfei Dai, Jiangnan Li, Kaixiang Zhu, Huizhen Kuang, Hao Zhou, Eric Ren, Xifan Tang, Weijun Qin, Tao Li, Lingli Wang
2024 — book
FPGA EDA - Design Principles and Implementation
Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipovic, Zhufei Chu
2023 J jnl
A Scalable and Area-Efficient Configuration Circuitry for Semi-Custom FPGA Design.
IEEE Trans. Very Large Scale Integr. Syst.
Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
2023 — conf
Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks.
APCCAS
Anubhav Mishra, Nanditha Rao, Ganesh Gore, Xifan Tang
2023 J jnl
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction.
IEEE Trans. Very Large Scale Integr. Syst.
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
2022 J jnl
ALICE: An Automatic Design Flow for eFPGA Redaction.
CoRR
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
2022 A* conf
ALICE: an automatic design flow for eFPGA redaction.
DAC
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
2021 — conf
A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs.
ISPD
Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
2021 A conf
Exploring eFPGA-based Redaction for IP Protection.
ICCAD
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
2021 J jnl
Exploring eFPGA-based Redaction for IP Protection.
CoRR
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
2021 A* conf
Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis.
DAC
Scott Temple, Walter Lau Neto, Ashton Snelgrove, Xifan Tang, Pierre-Emmanuel Gaillardon
2021 J jnl
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction.
CoRR
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
2021 C conf
Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs.
ISCAS
Aurélien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon
2021 B conf
Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project.
FPL
Xifan Tang, Ganesh Gore, Grant Brown, Pierre-Emmanuel Gaillardon
2020 A conf
A RRAM-based FPGA for Energy-efficient Edge Computing.
DATE
Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon
2020 A conf
A Scalable Mixed Synthesis Framework for Heterogeneous Networks.
DATE
Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
2020 J jnl
OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs.
IEEE Micro
Xifan Tang, Edouard Giacomin, Baudouin Chauviere, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
2019 C conf
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories.
VLSI-SoC
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
2019 — conf
A Study on Switch Block Patterns for Tileable FPGA Routing Architectures.
FPT
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
2019 — conf
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.
VLSI-SoC (Selected Papers)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
2019 J jnl
FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2019 — conf
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs.
ISVLSI
Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon
2019 A conf
LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper.
ICCAD
Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
2019 B conf
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs.
FPL
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon
2018 J jnl
Post-P&R Performance and Power Analysis for RRAM-Based FPGAs.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017 J jnl
A High-Performance FPGA Architecture Using One-Level RRAM-Based Multiplexers.
IEEE Trans. Emerg. Top. Comput.
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017 — —
Circuit Design, Architecture and CAD for RRAM-based FPGAs.
Xifan Tang
2017 J jnl
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017 — conf
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains.
ACM Great Lakes Symposium on VLSI
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017 — conf
Optimization opportunities in RRAM-based FPGA architectures.
LASCAS
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017 — conf
Physical Design Considerations of One-level RRAM-based Routing Multiplexers.
ISPD
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2016 A conf
A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only).
FPGA
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016 J jnl
A Study on the Programming Structures for RRAM-Based FPGA Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xifan Tang, Gain Kim, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015 J jnl
A Novel FPGA Architecture Based on Ultrafine Grain Reconfigurable Logic Cells.
IEEE Trans. Very Large Scale Integr. Syst.
Pierre-Emmanuel Gaillardon, Xifan Tang, Gain Kim, Giovanni De Micheli
2015 — conf
A study on buffer distribution for RRAM-based FPGA routing structures.
LASCAS
Somayyeh Rahimian Omam, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015 A conf
A ultra-low-power FPGA based on monolithically integrated RRAMs.
DATE
Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2015 B conf
Accurate power analysis for near-Vt RRAM-based FPGA.
FPL
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015 C conf
FPGA-SPICE: A simulation-based power estimation framework for FPGAs.
ICCD
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015 A conf
Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only).
FPGA
Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
2014 — conf
A high-performance low-power near-Vt RRAM-based FPGA.
FPT
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014 J jnl
Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jian Zhang, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014 — conf
Novel configurable logic block architecture exploiting controllable-polarity transistors.
ReCoSoC
Pierre-Emmanuel Gaillardon, Xifan Tang, Giovanni De Micheli
2014 B conf
Pattern-based FPGA logic block and clustering algorithm.
FPL
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014 C conf
TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs.
ISCAS
Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013 J jnl
An Enhanced Design Methodology for Resonant Clock Trees.
J. Low Power Electron.
Somayyeh Rahimian, Vasilis F. Pavlidis, Xifan Tang, Giovanni De Micheli
2013 J jnl
Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise.
IEEE Trans. Very Large Scale Integr. Syst.
Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli