Xiaoyu Zhang

16 papers A* 3A 2C 3Journal 7Unranked 1
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing.
IEEE Trans. Computers
Zerun Li, Xiaoming Chen, Yuxin Yang, Feng Min, Xiaoyu Zhang, Yinhe Han
2025 A* conf
CIM-BLAS: Computing-in-Memory Accelerator for BLAS.
DAC
Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2025 J jnl
In-Memory Computing Accelerator for Iterative Linear Algebra Solvers.
IEEE Comput. Archit. Lett.
Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2025 J jnl
Low-Latency PIM Accelerator for Edge LLM Inference.
IEEE Comput. Archit. Lett.
Xinyu Wang, Xiaotian Sun, Wanqian Li, Feng Min, Xiaoyu Zhang, Xinjiang Zhang, Yinhe Han, Xiaoming Chen
2024 J jnl
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators.
IEEE Des. Test
Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang
2024 J jnl
GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication.
IEEE Trans. Computers
Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han
2024 C conf
MemSort: In-Memory Sorting Architecture.
ICCD
Rui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang
2023 A* conf
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator.
DAC
Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han
2023 J jnl
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang
2023 C conf
Hardware-Software Co-Design for Content-Based Sparse Attention.
ICCD
Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han
2023 A conf
LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture.
ICCAD
Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen
2023 A conf
Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function Synthesis.
ICCAD
Boyu Long, Libo Shen, Xiaoyu Zhang, Yinhe Han, Xian-He Sun, Xiaoming Chen
2022 — conf
FeMIC: Multi-Operands in-Memory Computing Based on FeFETs.
ASP-DAC
Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2022 J jnl
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen
2021 A* conf
BRAHMS: Beyond Conventional RRAM-based Neural Network Accelerators Using Hybrid Analog Memory System.
DAC
Tao Song, Xiaoming Chen, Xiaoyu Zhang, Yinhe Han
2019 C conf
FeMAT: Exploring In-Memory Processing in Multifunctional FeFET-Based Memory Array.
ICCD
Xiaoyu Zhang, Xiaoming Chen, Yinhe Han