Xiaoyu Sun

35 papers A* 2A 3Journal 17Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 3 nm FinFET 125 TOPS/W-29 TFLOPS/W, 90 TOPS/mm
IEEE J. Solid State Circuits
Haruki Mori, Je-Min Hung, Wei-Chang Zhao, Kinshuk Khare, Brian Crafton, Hiroaki Ishii, Cheng-En Lee, Xiaochen Peng, Xiaoyu Sun, Yorinobu Fujino, Chia-Jung Tsen, Vineet Joshi, Chao-Kai Chuang, Takeshi Hashizume, Chia-Fu Lee, Tan-Li Chou, Kerem Akarvardar, Saman Adham, Yih Wang, Hidehiro Fujiwara, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang
2026 J jnl
Ultrafast Generative AI by Ultradense 3D Integration: A Case Study on LLM-based Edge Inference.
ACM Trans. Design Autom. Electr. Syst.
Kerem Akarvardar, Xiaoyu Sun, Brian Crafton, Xiaochen Peng, Haruki Mori, Abhiroop Bhattacharjee, Hidehiro Fujiwara, H.-S. Philip Wong
2025 J jnl
Enhancing DCIM Efficiency with Multi-Storage-Row Architecture for Edge AI Workloads.
IEEE Comput. Archit. Lett.
Xiaoyu Sun, Haruki Mori, Wei-Chang Zhao, Je-Min Hung, Hidehiro Fujiwara, Brian Crafton, Bo Zhang, Win-San Khwa, Yu-Der Chih, Tsung-Yung Jonathan Chang, Kerem Akarvardar
2025 A* conf
Finding the Pareto Frontier of Low-Precision Data Formats and MAC Architecture for LLM Inference.
DAC
Brian Crafton, Xiaochen Peng, Xiaoyu Sun, Ashwin Sanjay Lele, Bo Zhang, Win-San Khwa, Kerem Akarvardar
2024 J jnl
Efficient Processing of MLPerf Mobile Workloads Using Digital Compute-In-Memory Macros.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoyu Sun, Weidong Cao, Brian Crafton, Kerem Akarvardar, Haruki Mori, Hidehiro Fujiwara, Hiroki Noguchi, Yu-Der Chih, Meng-Fan Chang, Yih Wang, Tsung-Yung Jonathan Chang
2024 J jnl
Estimating Power, Performance, and Area for On-Sensor Deployment of AR/VR Workloads Using an Analytical Framework.
ACM Trans. Design Autom. Electr. Syst.
Xiaoyu Sun, Xiaochen Peng, Sai Qian Zhang, Jorge Gomez, Win-San Khwa, Syed Shakib Sarwar, Ziyun Li, Weidong Cao, Zhao Wang, Chiao Liu, Meng-Fan Chang, Barbara De Salvo, Kerem Akarvardar, H.-S. Philip Wong
2024 J jnl
Neural Architecture Search of Hybrid Models for NPU-CIM Heterogeneous AR/VR Devices.
CoRR
Yiwei Zhao, Ziyun Li, Win-San Khwa, Xiaoyu Sun, Sai Qian Zhang, Syed Shakib Sarwar, Kleber Hugo Stangherlin, Yi-Lun Lu, Jorge Tomás Gómez, Jae-sun Seo, Phillip B. Gibbons, Barbara De Salvo, Chiao Liu
2024 A conf
Non-volatile Memory Technologies for Edge AI Applications.
ICCAD
Xiaoyu Sun, Win-San Khwa, Xiaochen Peng, Meng-Fan Chang, Kerem Akarvardar
2022 J jnl
A 40-nm MLC-RRAM Compute-in-Memory Macro With Sparsity Control, On-Chip Write-Verify, and Temperature-Independent ADC References.
IEEE J. Solid State Circuits
Wantong Li, Xiaoyu Sun, Shanshi Huang, Hongwu Jiang, Shimeng Yu
2022 J jnl
Achieving High In Situ Training Accuracy and Energy Efficiency with Analog Non-Volatile Synaptic Devices.
ACM Trans. Design Autom. Electr. Syst.
Shanshi Huang, Xiaoyu Sun, Xiaochen Peng, Hongwu Jiang, Shimeng Yu
2021 — conf
A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC References.
ESSCIRC
Wantong Li, Xiaoyu Sun, Hongwu Jiang, Shanshi Huang, Shimeng Yu
2021 — conf
A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC References.
ESSDERC
Wantong Li, Xiaoyu Sun, Hongwu Jiang, Shanshi Huang, Shimeng Yu
2021 J jnl
A Highly Reliable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source.
IEEE J. Solid State Circuits
Bohan Lin, Yachuan Pang, Bin Gao, Jianshi Tang, Dong Wu, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, Meng-Fan Chang, He Qian, Huaqiang Wu
2021 — conf
Characterization and Mitigation of Relaxation Effects on Multi-level RRAM based In-Memory Computing.
IRPS
Wangxin He, Wonbo Shim, Shihui Yin, Xiaoyu Sun, Deliang Fan, Shimeng Yu, Jae-sun Seo
2021 — —
Compute-in-Memory with Emerging non-Volatile Memories for Accelerating Deep Neural Networks.
Xiaoyu Sun
2021 J jnl
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim
2021 — conf
Secure-RRAM: A 40nm 16kb Compute-in-Memory Macro with Reconfigurability, Sparsity Control, and Embedded Security.
CICC
Wantong Li, Shanshi Huang, Xiaoyu Sun, Hongwu Jiang, Shimeng Yu
2020 J jnl
A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors.
IEEE J. Solid State Circuits
Xin Si, Rui Liu, Shimeng Yu, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Qiang Li, Meng-Fan Chang, Jia-Jing Chen, Yung-Ning Tu, Wei-Hsing Huang, Jing-Hong Wang, Yen-Cheng Chiu, Wei-Chen Wei, Ssu-Yen Wu, Xiaoyu Sun
2020 — conf
Compute-in-Memory with Emerging Nonvolatile-Memories: Challenges and Prospects.
CICC
Shimeng Yu, Xiaoyu Sun, Xiaochen Peng, Shanshi Huang
2020 A conf
Overcoming Challenges for Achieving High in-situ Training Accuracy with Emerging Memories.
DATE
Shanshi Huang, Xiaoyu Sun, Xiaochen Peng, Hongwu Jiang, Shimeng Yu
2020 J jnl
The Impact of Ferroelectric FETs on Digital and Analog Circuits and Architectures.
IEEE Des. Test
Xiaoming Chen, Kai Ni, Michael T. Niemier, Dayane Reis, Xiaoyu Sun, Panni Wang, Suman Datta, Xiaobo Sharon Hu, Xunzhao Yin, Matthew Jerry, Shimeng Yu, Ann Franchesca Laguna
2019 J jnl
A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xin Si, Win-San Khwa, Jia-Jing Chen, Jia-Fang Li, Xiaoyu Sun, Rui Liu, Shimeng Yu, Hiroyuki Yamauchi, Qiang Li, Meng-Fan Chang
2019 — conf
A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10
ISSCC
Yachun Pang, Bin Gao, Dong Wu, Shengyu Yi, Qi Liu, Wei-Hao Chen, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, He Qian, Meng-Fan Chang, Huaqiang Wu
2019 — conf
A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning.
ISSCC
Xin Si, Jia-Jing Chen, Yung-Ning Tu, Wei-Hsing Huang, Jing-Hong Wang, Yen-Cheng Chiu, Wei-Chen Wei, Ssu-Yen Wu, Xiaoyu Sun, Rui Liu, Shimeng Yu, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Qiang Li, Meng-Fan Chang
2019 J jnl
High-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS.
CoRR
Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo
2019 J jnl
Impact of Non-Ideal Characteristics of Resistive Synaptic Devices on Implementing Convolutional Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Xiaoyu Sun, Shimeng Yu
2019 — conf
Inference engine benchmarking across technological platforms from CMOS to RRAM.
MEMSYS
Xiaochen Peng, Minkyu Kim, Xiaoyu Sun, Shihui Yin, Titash Rakshit, Ryan M. Hatcher, Jorge A. Kittl, Jae-sun Seo, Shimeng Yu
2019 J jnl
Monolithically Integrated RRAM- and CMOS-Based In-Memory Computing Optimizations for Efficient Deep Learning.
IEEE Micro
Shihui Yin, Jae-sun Seo, Yulhwa Kim, Xu Han, Hugh J. Barnaby, Shimeng Yu, Yandong Luo, Wangxin He, Xiaoyu Sun, Jae-Joon Kim
2018 — conf
A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors.
ISSCC
Win-San Khwa, Jia-Jing Chen, Jia-Fang Li, Xin Si, En-Yu Yang, Xiaoyu Sun, Rui Liu, Pai-Yu Chen, Qiang Li, Shimeng Yu, Meng-Fan Chang
2018 — conf
A Parallel RRAM Synaptic Array Architecture for Energy-Efficient Recurrent Neural Networks.
SiPS
Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo, Chaitali Chakrabarti
2018 — conf
A Versatile ReRAM-based Accelerator for Convolutional Neural Networks.
SiPS
Manqing Mao, Xiaoyu Sun, Xiaochen Peng, Shimeng Yu, Chaitali Chakrabarti
2018 — conf
Fully parallel RRAM synaptic array for implementing binary neural network with (+1, -1) weights and (+1, 0) neurons.
ASP-DAC
Xiaoyu Sun, Xiaochen Peng, Pai-Yu Chen, Rui Liu, Jae-sun Seo, Shimeng Yu
2018 A* conf
Parallelizing SRAM arrays with customized bit-cell for binary neural networks.
DAC
Rui Liu, Xiaochen Peng, Xiaoyu Sun, Win-San Khwa, Xin Si, Jia-Jing Chen, Jia-Fang Li, Meng-Fan Chang, Shimeng Yu
2018 A conf
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks.
DATE
Xiaoyu Sun, Shihui Yin, Xiaochen Peng, Rui Liu, Jae-sun Seo, Shimeng Yu
2017 J jnl
Low-VDD Operation of SRAM Synaptic Array for Implementing Ternary Neural Network.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoyu Sun, Rui Liu, Yi-Ju Chen, Hsiao-Yun Chiu, Wei-Hao Chen, Meng-Fan Chang, Shimeng Yu