Xiaoyan Gui

40 papers C 2Journal 9Unranked 29
YearRankTypeTitle / Venue / Authors
2026 — conf
A 112Gb/s PAM-4 SBD Transceiver with Mismatch-Compensated 2×VDD Hybrid and Two-Step Echo Canceller in 28nm CMOS.
ISSCC
Huanfa Sun, Shangjie Wei, Yu Su, Chenyao Cao, Yujie Zeng, Yukun He, Zhouchi Duan, Guohe Zhang, Xiaoyan Gui
2025 — conf
36.5 A Low-Latency 200Gb/s PAM-4 Heterogeneous Transceiver in 0.13μm SiGe BiCMOS and 28nm CMOS for Retimed Pluggable Optics.
ISSCC
Renjie Tang, Kanan Wang, Shuyi Xiang, Yu Su, Chenyao Cao, Yukun He, Xiaoyan Gui
2025 — conf
7.9 A 60Gb/s NRZ Burst-Mode CDR with Cross-Injection Locking and Flash Phase Detector Achieving 0.13ns Reconfiguration Time in 28nm CMOS.
ISSCC
Shangjie Wei, Renjie Tang, Chenyao Cao, Yu Su, Kanan Wang, Zhengyang Ye, Huanfa Sun, Kun Fu, Xiaoyan Gui
2025 J jnl
A 0.92-pJ/b 112-Gb/s PAM-4 Transmitter With Bandwidth and Linearity Enhanced Quasi-Voltage-Mode Driver and Reconfigurable Three-Tap T/2-T Variable Fractional-Spaced FFE in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kanan Wang, Renjie Tang, Shuyi Xiang, Yukun He, Yunxiang He, Xiaoyan Gui
2025 J jnl
A 32 Gb/s Burst-Mode Transimpedance Amplifier With 2.625 ns Reconfiguration Time for All-Optical Network Switching.
IEEE Trans. Circuits Syst. II Express Briefs
Yukun He, Zhengyang Ye, Kanan Wang, Xi'an Chen, Zhouchi Duan, Junhao Zhao, Renjie Tang, Xiaoyan Gui
2024 — conf
130 GBaud PAM-4 1-to-4 Analog Demultiplexer for Wireline and Optical Receivers in 130-nm SiGe.
ICTA
Yu Su, Chenyao Cao, Bingyu Zhao, Renjie Tang, Shangjie Wei, Yukun He, Yuyan Lv, Xiaoyan Gui
2024 — conf
A 4×4 5-6GHz CMOS Wi-Fi Transceiver Front-End for Fiber-to-the-Room with Analog Beamforming Achieving 27dBm 1024 QAM MCS11 EIRP and -45dB EVM Floor.
CICC
Xin Lei, Xinhao Zheng, Yiqian Nie, Xinke Huang, Kun Fu, Yukun He, Xiaoyan Gui
2024 — conf
A Low-Noise Power-Efficient Stacked Differential Transimpedance Amplifier in 0.18-μm CMOS.
ICTA
Shuaizhe Ma, Xi Liu, Nianquan Ran, Yuye Yang, Yifei Xia, Ruixuan Yang, Binhao Wang, Yanlong Zhang, Xuhui Wang, Xiaoyan Gui, Li Geng, Dan Li
2024 — conf
An Integrated Burst-Mode 2R Receiver Employing Fast Residual Offset Canceller for XGS-PON in 40-nm CMOS.
CICC
Yifei Xia, Shuaizhe Ma, Wanqing Zhao, Jia Li, Ruixuan Yang, Yuye Yang, Xi Liu, Feiyang Zhang, Jianyu Yang, Wenbo Shi, Lei Jing, Xiaoyan Gui, Bing Zhang, Li Geng, Dan Li
2024 J jnl
Signal Integrity Augmentation Techniques for the Design of 64-GBaud Coherent Transimpedance Amplifier in 90-nm SiGe BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shuaizhe Ma, Nianquan Ran, Xi Liu, Yifei Xia, Songqin Xu, Wei Huang, Chen Tan, Jing Li, Zhenyu Yin, Shaoheng Lin, Jianhua Pan, Zhe Chen, Chaoxuan Zhang, Wu Wen, Quan Pan, Zhongming Xue, Xiaoyan Gui, Li Geng, Dan Li
2023 — conf
A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS.
ICTA
Yukun He, Zhao Yuan, Kanan Wang, Renjie Tang, Yunxiang He, Dan Li, Li Geng, Xiaoyan Gui
2023 J jnl
A CMOS slew-rate controlled output driver with low process, voltage and temperature variations using a dual-path signal-superposition technique.
IET Circuits Devices Syst.
Xiaoyan Gui, Renjie Tang, Kai Li, Kanan Wang, Dan Li, Quan Pan, Li Geng
2022 — conf
A 10/2.5-Gb/s Hyper-Supplied CMOS Low-Noise Burst-Mode TIA with Loud Burst Protection and Gearbox Automatic Offset Cancellation for XGS-PON.
CICC
Chen Tan, Wei Huang, Yonghui Fan, Jing Li, Chuanhao Yu, Wenbo Shi, Shiti Huang, Zhenyu Yin, Chenfan Cao, Lei Jing, Zhixiong Ren, Xiaoyan Gui, Bing Zhang, Dan Li, Li Geng
2022 J jnl
A 12-Bit 20-kS/s 640-nW SAR ADC With a VCDL-Based Open-Loop Time-Domain Comparator.
IEEE Trans. Circuits Syst. II Express Briefs
Xiaochuan Zhou, Xiaoyan Gui, Marjan Gusev, Nevena Ackovska, Yanlong Zhang, Li Geng
2022 J jnl
A 54-68 GHz Power Amplifier With Improved Linearity and Efficiency in 40 nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Hamed Mosalam, Wenbo Xiao, Xiaoyan Gui, Dan Li, Quan Pan
2021 J jnl
A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array.
Microelectron. J.
Li Dong, Yan Song, Yi Xie, Youze Xin, Ken Li, Xixin Jing, Bing Zhang, Xiaoyan Gui, Li Geng
2021 — conf
A 100GBaud Optical Receiver Front-End in 90nm SiGe BiCMOS.
ICTA
Chuanhao Yu, Zhenyu Yin, Chenfan Cao, Shiti Huang, Quan Pan, Xiaoyan Gui, Li Geng, Dan Li
2021 — conf
A 130-GBaud 2: 1 Analog Multiplexer in 130-nm SiGe BiCMOS.
ICTA
Kanan Wang, Kuantian Guo, Haoran Yang, Renjie Tang, Zhen Zhao, Dan Li, Xiaoyan Gui
2021 — conf
A 720-mVpp 224-Gb/s PAM4 Optical Receiver with Multiple Peaking Techniques in 130-nm SiGe BiCMOS.
APCCAS
Qi Zhang, Xiongshi Luo, Zhenghao Li, Dongfan Xu, Siqiang Zhu, Leiming Wang, Zhenjiang Mao, Xiaoyan Gui, Dan Li, Hongyu Yu, Quan Pan
2021 — conf
A Low-Noise Stacked Differential Optical Receiver in 0.18-μm CMOS.
MWSCAS
Wei Huang, Xiangwen Liu, Yongjun Shi, Dan Li, Bing Zhang, Xiaoyan Gui, Li Geng
2020 — conf
A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment.
ICTA
Renjie Tang, Kanan Wang, Dan Li, Li Geng, Xiaoyan Gui
2020 C conf
A 112-Gb/s PAM-4 Linear Optical Receiver in 130-nm SiGe BiCMOS.
ISCAS
Dan Li, Shengwei Gao, Yongjun Shi, Xiaoyan Gui, Nan Qi, Zhiyong Li, Quan Pan, Patrick Chiang, Li Geng
2020 — conf
A 16Gb/s Triple-Mode Driver in 0.18μm CMOS Technology.
ICTA
Xiangwen Liu, Yihua Zhang, Chuangji Zhou, Dan Li, Xiaoyan Gui, Li Geng
2020 — conf
A Full-duplex Transceiver with Integrated Active Quasi-circulator Achieving Self-interference RF Cancellation over Wide Bandwidth.
ICTA
Bingjun Tang, Jiangtao Xu, Xiaoyan Gui, Dan Li, Li Geng
2020 J jnl
Low-Supply Sensitivity LC VCOs With Complementary Varactors.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoyan Gui, Bingjun Tang, Renjie Tang, Dan Li, Li Geng
2019 — conf
A Multi-Channel 1.52 µVrms Front End with Orthogonal Frequency Chopping for Neural Recording Applications.
APCCAS
Li Dong, Zhechong Lan, Xiaoyan Gui, Chengyang He, Youze Xin, Ken Li, Li Geng
2019 C conf
A Stacked 4×25 Gb/s Optical Receiver in 28 nm CMOS with 0.154 mW/Gb/s Power Efficiency.
ISCAS
Yihua Zhang, Zhuoqi Guo, Yang Xie, Dan Li, Shiquan Fan, Xiaoyan Gui, Li Geng
2018 — conf
A Dual-Path Open-Loop CMOS Slew-Rate Controlled Output Driver with low PVT Variation.
MWSCAS
Xiaoyan Gui, Kai Li, Xiaoli Wang, Li Geng
2018 — conf
Design of A Low-Supply Sensitivity LC VCO with Complementary Varactors.
MWSCAS
Bingjun Tang, Xiaoyan Gui, Li Geng
2015 — conf
Design of a 12-bit 0.83 MS/s SAR ADC for an IPMI SoC.
SoCC
Han Zhou, Xiaoyan Gui, Peng Gao
2015 — conf
Modeling and design of a 0.8-30 GHz tunable inductor-less divide-by-2 frequency divider with digital frequency calibration.
MWSCAS
Peng Gao, Zicheng Liu, Xiaoyan Gui
2013 — conf
A Compensated Technique for 2.5-GHz Ring-Oscillator-Based PLL used in Wireless Transmission.
GreenCom/iThings/CPScom
Hua Dang, Zicheng Liu, Xiaoyan Gui, Shun'an Zhong
2013 — conf
A Whole Integrated System for Detection of Neural Signal and Wireless Transmission.
GreenCom/iThings/CPScom
Hua Dang, Ruoyuan Qu, Zhiming Chen, Xiaoyan Gui, Xinghua Wang
2013 — conf
Circuit Design of Analog Front-End for Neural Signal Detection.
GreenCom/iThings/CPScom
Hua Dang, Lei Zhang, Zhiming Chen, Xiaoyan Gui, Xinghua Wang
2013 — conf
Design and Implementation of a CMOS 1Gsps 5bit Flash ADC with Offset Calibration.
GreenCom/iThings/CPScom
Shiwen Li, Hua Dang, Peng Gao, Xiaoyan Gui, Zhiming Chen, Xinghua Wang, Shun'an Zhong
2013 — conf
Design and Implementation of a Circuit System for Neural Signal Detection.
GreenCom/iThings/CPScom
Hua Dang, Xiao Li, Zhiming Chen, Xiaoyan Gui, Xinghua Wang, Shun'an Zhong
2013 J jnl
Design of CML Ring Oscillators With Low Supply Sensitivity.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaoyan Gui, Michael M. Green
2013 — conf
Wireless circuits design for neural recording application.
TSP
Ruoyuan Qu, Na Liu, Zhe Guo, Xinghua Wang, Xiaoyan Gui
2011 — conf
Nonlinearities in frequency dividers.
ECCTD
Xiaoyan Gui, Michael M. Green
2010 — conf
High-speed CMOS ring oscillators with low supply sensitivity.
CICC
Xiaoyan Gui, Michael M. Green