Xiaoqiang Zhang

19 papers C 1Journal 18

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Compact fully-unrolled architectures for AES based on merging and combining of linear operations. Microelectron. J. Xiaoqiang Zhang, ZhiWei Peng, Yingjie Ma, Tianming Ni, Xinnan Lin, Xinxing Zheng
2022	J	`jnl`	Low delay AES S-box designs based on matrix merging method. IEICE Electron. Express Xiaoqiang Zhang, Lan Tang, Xinggan Zhang, Xinxing Zheng, Mingyu Xu, Fan Yang
2021	J	`jnl`	A Novel TDMA-Based Fault Tolerance Technique for the TSVs in 3D-ICs Using Honeycomb Topology. IEEE Trans. Emerg. Top. Comput. Tianming Ni, Zhao Yang, Hao Chang, Xiaoqiang Zhang, Lin Lu, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen
2020	J	`jnl`	A full matrix joint optimization method for hardware implementation of AES MixColumns/InvMixColumns. IEICE Electron. Express Xiaoqiang Zhang, Fan Yang, Xinxing Zheng, Xinggan Zhang, Ning Wu
2020	J	`jnl`	A low critical path delay structure for composite field AES S-box based on constant matrices multiplication merging. IEICE Electron. Express Xiaoqiang Zhang, Xinggan Zhang, Lan Tang, Xinxing Zheng, Tianming Ni, Ning Wu
2019	J	`jnl`	A new method for resisting collision attack based on parallel random delay S-box. IEICE Electron. Express Fang Zhou, Ning Wu, Xiaoqiang Zhang, Jinbao Zhang
2019	C	`conf`	Poet: A Power Efficient Hybrid Optical NoC Topology for Heterogeneous CPU-GPU Systems. IECON Tao Cheng, Ning Wu, Gaizhen Yan, Xinggan Zhang, Xiaoqiang Zhang
2018	J	`jnl`	An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm. J. Circuits Syst. Comput. Yunfei Ye, Ning Wu, Xiaoqiang Zhang, Liling Dong, Fang Zhou
2018	J	`jnl`	Compact Hardware Implementations of MISTY1 Block Cipher. J. Circuits Syst. Comput. Yasir Khizar, Ning Wu, Xiaoqiang Zhang
2018	J	`jnl`	High performance AES-GCM implementation based on efficient AES and FR-KOA multiplier. IEICE Electron. Express Yong Zhang, Ning Wu, Fang Zhou, Xiaoqiang Zhang, Jinbao Zhang
2018	J	`jnl`	Research on physical unclonable functions circuit based on three dimensional integrated circuit. IEICE Electron. Express Tianming Ni, Hao Chang, Xiaoqiang Zhang, Hao Xiao, Zhengfeng Huang
2017	J	`jnl`	A new compact hardware architecture of S-Box for block ciphers AES and SM4. IEICE Electron. Express Yaoping Liu, Ning Wu, Xiaoqiang Zhang, Fang Zhou
2017	J	`jnl`	FPGA based highly efficient MISTY1 architecture. IEICE Electron. Express Yasir Khizar, Ning Wu, Xin Chen, Muhammad Rehan Yahya, Xiaoqiang Zhang
2016	J	`jnl`	Against fault attacks based on random infection mechanism. IEICE Electron. Express Jinbao Zhang, Ning Wu, Xiaoqiang Zhang, Fang Zhou
2016	J	`jnl`	Low-delay parallel Chien search architecture for RS decoder. IEICE Electron. Express Xiaoqiang Zhang, Ning Wu, Fang Zhou, Jianhua Li, Yasir Khizar
2016	J	`jnl`	Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. J. Circuits Syst. Comput. Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge
2015	J	`jnl`	An evolutionary algorithm based on novel hybrid repair strategy for combinational logic circuits. IEICE Electron. Express Xinjie Huang, Ning Wu, Xiaoqiang Zhang, Yaoping Liu
2015	J	`jnl`	High-performance adaptive hybrid wireless NoC architecture based on improved congestion measurement. IEICE Electron. Express Jianhua Li, Ning Wu, Yongliang Hu, Xiaoqiang Zhang
2014	J	`jnl`	An optimized delay-aware common subexpression elimination algorithm for hardware implementation of binary-field linear transform. IEICE Electron. Express Xiaoqiang Zhang, Ning Wu, Fang Zhou, Xin Chen