Xiaoming Chen - RankMe

150 papers A* 20A 23C 7Journal 63Unranked 37

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	I/O Analysis is All You Need: An I/O Analysis for Long-Sequence Attention. ASPLOS (2) Xiaoyang Lu, Boyu Long, Xiaoming Chen, Yinhe Han, Xian-He Sun
2026	J	`jnl`	Resistive Memory based Efficient Machine Unlearning and Continual Learning. CoRR Ning Lin, Jichang Yang, Yangu He, Zijian Ye, Kwunhang Wong, Xinyuan Zhang, Songqi Wang, Yi Li, Kemi Xu, Leo Yu Zhang, Xiaoming Chen, Dashan Shang, Han Wang, Xiaojuan Qi, Zhongrui Wang
2025	J	`jnl`	A Data-Centric Software-Hardware Co-Designed Architecture for Large-Scale Graph Processing. IEEE Trans. Computers Zerun Li, Xiaoming Chen, Yuxin Yang, Feng Min, Xiaoyu Zhang, Yinhe Han
2025	J	`jnl`	Balancing Graph Processing Workloads in Heterogeneous CPU-PIM Systems. IEEE Trans. Emerg. Top. Comput. Sheng Xu, Chun Li, Le Luo, Ming Zheng, Liang Yan, Xingqi Zou, Xiaoming Chen
2025	A*	`conf`	CIM-BLAS: Computing-in-Memory Accelerator for BLAS. DAC Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2025	J	`jnl`	CKTSO: High-Performance Parallel Sparse Linear Solver for General Circuit Simulations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoming Chen
2025	—	`conf`	Concurrency-Aware Cache Miss Cost Prediction with Perceptron Learning. ACM Great Lakes Symposium on VLSI Yuping Wu, Xiaoyang Lu, Xiaoming Chen, Yinhe Han, Xian-He Sun
2025	A*	`conf`	Guarder: A Stable and Lightweight Reconfigurable RRAM-based PIM Accelerator for DNN IP Protection. DAC Ning Lin, Yi Li, Jiankun Li, Jichang Yang, Yangu He, Yukui Luo, Dashan Shang, Xiaoming Chen, Xiaojuan Qi, Zhongrui Wang
2025	J	`jnl`	Identifying Optimal Workload Offloading Partitions for CPU-PIM Graph Processing Accelerators. IEEE Trans. Very Large Scale Integr. Syst. Sheng Xu, Chun Li, Le Luo, Wu Zhou, Liang Yan, Xiaoming Chen
2025	J	`jnl`	In-Memory Computing Accelerator for Iterative Linear Algebra Solvers. IEEE Comput. Archit. Lett. Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2025	J	`jnl`	Low-Latency PIM Accelerator for Edge LLM Inference. IEEE Comput. Archit. Lett. Xinyu Wang, Xiaotian Sun, Wanqian Li, Feng Min, Xiaoyu Zhang, Xinjiang Zhang, Yinhe Han, Xiaoming Chen
2025	J	`jnl`	PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaotian Sun, Xinyu Wang, Wanqian Li, Yinhe Han, Xiaoming Chen
2025	J	`jnl`	ProMiner: Enhancing Locality, Parallelism, and Offloading for Graph Mining on Processing-in-Memory Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liang Yan, Xiaoyang Lu, Sheng Xu, Xiaoming Chen, Xingqi Zou, Yinhe Han, Xian-He Sun
2025	J	`jnl`	Pyramid: Accelerating LLM Inference With Cross-Level Processing-in-Memory. IEEE Comput. Archit. Lett. Liang Yan, Xiaoyang Lu, Xiaoming Chen, Yinhe Han, Xian-He Sun
2025	J	`jnl`	Re-Meltrix: A Reconfigurable Processing-in-Memory Architecture Based on RRAM and Function Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Boyu Long, Yinhe Han, Xian-He Sun, Xiaoming Chen
2025	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. Nat. Comput. Sci. Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xinyuan Zhang, Kwunhang Wong, Songqi Wang, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Dashan Shang, Qi Liu, Ming Liu
2024	—	`conf`	ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations. ASPLOS (3) Xiaoyang Lu, Boyu Long, Xiaoming Chen, Yinhe Han, Xian-He Sun
2024	C	`conf`	Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAs. ISCAS Yi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han
2024	C	`conf`	AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System. ICCD Liang Yan, Xiaoyang Lu, Xiaoming Chen, Sheng Xu, Xingqi Zou, Yinhe Han, Xian-He Sun
2024	J	`jnl`	BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devices. CoRR Yongqi Xu, Yujian Lee, Gao Yi, Bosheng Liu, Yucong Chen, Peng Liu, Jigang Wu, Xiaoming Chen, Yinhe Han
2024	J	`jnl`	Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators. IEEE Des. Test Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang
2024	J	`jnl`	GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication. IEEE Trans. Computers Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han
2024	J	`jnl`	JANM-IK: Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics and its Hardware Acceleration. IEEE Comput. Archit. Lett. Yuxin Yang, Xiaoming Chen, Yinhe Han
2024	A	`conf`	LSMR: Synergy Randomness in Liquid State Machine and RRAM-based Analog-digital Accelerator. ICCAD Ning Lin, Songqi Wang, Xinyuan Zhang, Shaocong Wang, Yangu He, Woyu Zhang, Bo Wang, Jiankun Li, Mingzi Li, Binbin Cui, Yi Li, Jia Chen, Chunwei Xia, Wei Xuan, Xiaoming Chen, Dashan Shang, Zhongrui Wang
2024	J	`jnl`	Mathematical Framework for Optimizing Crossbar Allocation for ReRAM-based CNN Accelerators. ACM Trans. Design Autom. Electr. Syst. Wanqian Li, Yinhe Han, Xiaoming Chen
2024	C	`conf`	MemSort: In-Memory Sorting Architecture. ICCD Rui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang
2024	A*	`conf`	Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of DNNs. DAC Ning Lin, Shaocong Wang, Yue Zhang, Yangu He, Kwunhang Wong, Arindam Basu, Dashan Shang, Xiaoming Chen, Zhongrui Wang
2024	J	`jnl`	Older and Wiser: The Marriage of Device Aging and Intellectual Property Protection of Deep Neural Networks. CoRR Ning Lin, Shaocong Wang, Yue Zhang, Yangu He, Kwunhang Wong, Arindam Basu, Dashan Shang, Xiaoming Chen, Zhongrui Wang
2024	J	`jnl`	PIMCOMP: An End-to-End DNN Compiler for Processing-In-Memory Accelerators. CoRR Xiaotian Sun, Xinyu Wang, Wanqian Li, Yinhe Han, Xiaoming Chen
2024	A	`conf`	PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. DATE Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen
2024	J	`jnl`	PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. CoRR Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen
2024	A	`conf`	PIMSYN: Synthesizing Processing-in-Memory CNN Accelerators. DATE Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen
2024	J	`jnl`	PIMSYN: Synthesizing Processing-in-memory CNN Accelerators. CoRR Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen
2024	A*	`conf`	ReCG: ReRAM-Accelerated Sparse Conjugate Gradient. DAC Mingjia Fan, Xiaoming Chen, Dechuang Yang, Zhou Jin, Weifeng Liu
2024	A	`conf`	SNNGX: Securing Spiking Neural Networks with Genetic XOR Encryption on RRAM-based Neuromorphic Accelerator. ICCAD Kwunhang Wong, Songqi Wang, Wei Huang, Xinyuan Zhang, Yangu He, Karl Ming Him Lai, Yuzhong Jiao, Ning Lin, Xiaojuan Qi, Xiaoming Chen, Zhongrui Wang
2024	J	`jnl`	SNNGX: Securing Spiking Neural Networks with Genetic XOR Encryption on RRAM-based Neuromorphic Accelerator. CoRR Kwunhang Wong, Songqi Wang, Wei Huang, Xinyuan Zhang, Yangu He, Karl M. H. Lai, Yuzhong Jiao, Ning Lin, Xiaojuan Qi, Xiaoming Chen, Zhongrui Wang
2024	A*	`conf`	TMiner: A Vertex-Based Task Scheduling Architecture for Graph Pattern Mining. MICRO Zerun Li, Xiaoming Chen, Yinhe Han
2023	—	`conf`	Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach. ASP-DAC Bosheng Liu, Hongyi Liang, Jigang Wu, Xiaoming Chen, Peng Liu, Yinhe Han
2023	A*	`conf`	Dadu-RBD: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. MICRO Yuxin Yang, Xiaoming Chen, Yinhe Han
2023	A*	`conf`	FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. DAC Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han
2023	J	`jnl`	FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang
2023	J	`jnl`	Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMs. IEEE Trans. Parallel Distributed Syst. Bosheng Liu, Zhuoshen Jiang, Yalan Wu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han
2023	C	`conf`	Hardware-Software Co-Design for Content-Based Sparse Attention. ICCD Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han
2023	A	`conf`	LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture. ICCAD Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen
2023	J	`jnl`	MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhenhua Zhu, Hanbo Sun, Tongxin Xie, Yu Zhu, Guohao Dai, Lixue Xia, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Huazhong Yang, Yu Wang
2023	A	`conf`	Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function Synthesis. ICCAD Boyu Long, Libo Shen, Xiaoyu Zhang, Yinhe Han, Xian-He Sun, Xiaoming Chen
2023	A*	`conf`	PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. DAC Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen
2023	J	`jnl`	PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. CoRR Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen
2023	J	`jnl`	RBDCore: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. CoRR Yuxin Yang, Xiaoming Chen, Yinhe Han
2023	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. CoRR Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xiaojuan Qi, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Qi Liu, Zhongrui Wang, Dashan Shang, Ming Liu
2022	—	`conf`	AIC-Bench: Workload Selection Methodology for Benchmarking AI Chips. HPCC/DSS/SmartCity/DependSys Zhenyu Quan, Xiaoming Chen, Yinhe Han
2022	—	`conf`	Energy-Efficient In-SRAM Accumulation for CMOS-based CNN Accelerators. ACM Great Lakes Symposium on VLSI Wanqian Li, Yinhe Han, Xiaoming Chen
2022	J	`jnl`	Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing. IEEE Embed. Syst. Lett. Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han
2022	—	`conf`	FeMIC: Multi-Operands in-Memory Computing Based on FeFETs. ASP-DAC Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang
2022	A*	`conf`	GraphRing: an HMC-ring based graph processing framework with optimized data movement. DAC Zerun Li, Xiaoming Chen, Yinhe Han
2022	A	`conf`	Numerically-Stable and Highly-Scalable Parallel LU Factorization for Circuit Simulation. ICCAD Xiaoming Chen
2022	—	`conf`	Optimal Data Allocation for Graph Processing in Processing-in-Memory Systems. ASP-DAC Zerun Li, Xiaoming Chen, Yinhe Han
2022	—	`conf`	P3S: A High Accuracy Probabilistic Prediction Processing System for CNN Acceleration. ACM Great Lakes Symposium on VLSI Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han
2022	—	`conf`	PME: Processing-in-memory Masking and Encoding for Secure NVM. HPCC/DSS/SmartCity/DependSys Zhiwen Xie, Yinhe Han, Xiaoming Chen
2022	J	`jnl`	Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen
2022	J	`jnl`	Search-Free Inference Acceleration for Sparse Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bosheng Liu, Xiaoming Chen, Yinhe Han, Jigang Wu, Liang Chang, Peng Liu, Haobo Xu
2022	—	`conf`	Solving Least-Squares Fitting in $O(1)$ Using RRAM-based Computing-in-Memory Technique. ASP-DAC Xiaoming Chen, Yinhe Han
2022	J	`jnl`	Toward Efficient Computing for Robotics: From a Circuit and System View. IEEE Trans. Circuits Syst. II Express Briefs Haobo Xu, Yuxin Yang, Feng Min, Junpei Huang, Xiaoming Chen, Yinhe Han, Ninghui Sun
2022	J	`jnl`	VNet: a versatile network to train real-time semantic segmentation models on a single GPU. Sci. China Inf. Sci. Wenxing Li, Ning Lin, Mingzhe Zhang, Hang Lu, Xiaoming Chen, Xiaowei Li
2021	A*	`conf`	BRAHMS: Beyond Conventional RRAM-based Neural Network Accelerators Using Hybrid Analog Memory System. DAC Tao Song, Xiaoming Chen, Xiaoyu Zhang, Yinhe Han
2021	J	`jnl`	Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology. Sci. China Inf. Sci. Xingqi Zou, Sheng Xu, Xiaoming Chen, Liang Yan, Yinhe Han
2021	—	`conf`	ChaoPIM: A PIM-based Protection Framework for DNN Accelerators Using Chaotic Encryption. ATS Ning Lin, Xiaoming Chen, Chunwei Xia, Jing Ye, Xiaowei Li
2021	J	`jnl`	Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ning Lin, Xiaoming Chen, Hang Lu, Xiaowei Li
2021	A	`conf`	CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications. ISLPED Liang Yan, Mingzhe Zhang, Rujia Wang, Xiaoming Chen, Xingqi Zou, Xiaoyang Lu, Yinhe Han, Xian-He Sun
2021	—	`conf`	Eliminating Iterations of Iterative Methods: Solving Large-Scale Sparse Linear System in ACM Great Lakes Symposium on VLSI Tao Song, Xiaoming Chen, Yinhe Han
2021	A*	`conf`	F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM. DAC Bosheng Liu, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han, Peng Liu
2021	J	`jnl`	FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture. ACM Trans. Design Autom. Electr. Syst. Xuefei Ning, Guangjun Ge, Wenshuo Li, Zhenhua Zhu, Yin Zheng, Xiaoming Chen, Zhen Gao, Yu Wang, Huazhong Yang
2021	—	`conf`	FePIM: Contention-Free In-Memory Computing Based on Ferroelectric Field-Effect Transistors. ASP-DAC Xiaoming Chen, Yuping Wu, Yinhe Han
2021	—	`conf`	RRAM-based Analog In-Memory Computing : Invited Paper. NANOARCH Xiaoming Chen, Tao Song, Yinhe Han
2020	—	`conf`	Accelerating RRT Motion Planning Using TCAM. ACM Great Lakes Symposium on VLSI Yuxin Yang, Shiqi Lian, Xiaoming Chen, Yinhe Han
2020	—	`conf`	An Energy-Efficient Quantized and Regularized Training Framework For Processing-In-Memory Accelerators. ASP-DAC Hanbo Sun, Zhenhua Zhu, Yi Cai, Xiaoming Chen, Yu Wang, Huazhong Yang
2020	—	`conf`	Black Box Search Space Profiling for Accelerator-Aware Neural Architecture Search. ASP-DAC Shulin Zeng, Hanbo Sun, Yu Xing, Xuefei Ning, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang
2020	A*	`conf`	Communication Lower Bound in Convolution Accelerators. HPCA Xiaoming Chen, Yinhe Han, Yu Wang
2020	A	`conf`	DaDu Series - Fast and Efficient Robot Accelerators. ICCAD Yinhe Han, Yuxin Yang, Xiaoming Chen, Shiqi Lian
2020	A*	`conf`	Dadu-CD: Fast and Efficient Processing-in-Memory Accelerator for Collision Detection. DAC Yuxin Yang, Xiaoming Chen, Yinhe Han
2020	J	`jnl`	Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. IEEE Trans. Computers Yi Cai, Xiaoming Chen, Lu Tian, Yu Wang, Huazhong Yang
2020	—	`conf`	FTT-NAS: Discovering Fault-Tolerant Neural Architecture. ASP-DAC Wenshuo Li, Xuefei Ning, Guangjun Ge, Xiaoming Chen, Yu Wang, Huazhong Yang
2020	J	`jnl`	FTT-NAS: Discovering Fault-Tolerant Neural Architecture. CoRR Xuefei Ning, Guangjun Ge, Wenshuo Li, Zhenhua Zhu, Yin Zheng, Xiaoming Chen, Zhen Gao, Yu Wang, Huazhong Yang
2020	J	`jnl`	Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang
2020	—	`conf`	MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems. ACM Great Lakes Symposium on VLSI Zhenhua Zhu, Hanbo Sun, Kaizhong Qiu, Lixue Xia, Gokul Krishnan, Guohao Dai, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Yu Wang, Huazhong Yang
2020	—	`conf`	Search-free Accelerator for Sparse Convolutional Neural Networks. ASP-DAC Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li
2020	—	`conf`	Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators. AICAS Wenshuo Li, Guangjun Ge, Kaiyuan Guo, Xiaoming Chen, Qi Wei, Zhen Gao, Yu Wang, Huazhong Yang
2020	J	`jnl`	Swallow: A Versatile Accelerator for Sparse Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bosheng Liu, Xiaoming Chen, Yinhe Han, Haobo Xu
2020	—	`conf`	TUPIM: A Transparent and Universal Processing-in-Memory Architecture for Unmodified Binaries. ACM Great Lakes Symposium on VLSI Sheng Xu, Xiaoming Chen, Xuehai Qian, Yinhe Han
2020	J	`jnl`	The Impact of Ferroelectric FETs on Digital and Analog Circuits and Architectures. IEEE Des. Test Xiaoming Chen, Kai Ni, Michael T. Niemier, Dayane Reis, Xiaoyu Sun, Panni Wang, Suman Datta, Xiaobo Sharon Hu, Xunzhao Yin, Matthew Jerry, Shimeng Yu, Ann Franchesca Laguna
2019	A	`conf`	A General Logic Synthesis Framework for Memristor-based Logic Design. ICCAD Zhenhua Zhu, Mingyuan Ma, Jialong Liu, Liying Xu, Xiaoming Chen, Yuchao Yang, Yu Wang, Huazhong Yang
2019	J	`jnl`	Accelerating DNN-based 3D point cloud processing for mobile computing. Sci. China Inf. Sci. Bosheng Liu, Xiaoming Chen, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li
2019	—	`conf`	Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators. ASP-DAC Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li
2019	J	`jnl`	Communication Lower Bound in Convolution Accelerators. CoRR Xiaoming Chen, Yinhe Han, Yu Wang
2019	—	`conf`	CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. ASP-DAC Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li
2019	J	`jnl`	Dependable Visual Light-Based Indoor Localization with Automatic Anomaly Detection for Location-Based Service of Mobile Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. Yang Liu, Xiaoming Chen, Dileep Kadambi, Ajinkya Bari, Xin Li, Shiyan Hu, Pingqiang Zhou
2019	A	`conf`	Enabling Secure in-Memory Neural Network Computing by Sparse Fast Gradient Encryption. ICCAD Yi Cai, Xiaoming Chen, Lu Tian, Yu Wang, Huazhong Yang
2019	C	`conf`	FeMAT: Exploring In-Memory Processing in Multifunctional FeFET-Based Memory Array. ICCD Xiaoyu Zhang, Xiaoming Chen, Yinhe Han
2019	J	`jnl`	Ferroelectric FETs-Based Nonvolatile Logic-in-Memory Circuits. IEEE Trans. Very Large Scale Integr. Syst. Xunzhao Yin, Xiaoming Chen, Michael T. Niemier, Xiaobo Sharon Hu
2019	A*	`conf`	Merging Everything (ME): A Unified FPGA Architecture Based on Logic-in-Memory Techniques. DAC Xiaoming Chen, Longxiang Yin, Bosheng Liu, Yinhe Han
2019	J	`jnl`	PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Archit. Lett. Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li
2019	J	`jnl`	Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs. IEEE Trans. Circuits Syst. I Regul. Pap. Xiaoming Chen, Kai Ni, Michael T. Niemier, Yinhe Han, Suman Datta, Xiaobo Sharon Hu
2019	J	`jnl`	Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator. IEICE Electron. Express Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li
2019	J	`jnl`	moDNN: Memory Optimal Deep Neural Network Training on Graphics Processing Units. IEEE Trans. Parallel Distributed Syst. Xiaoming Chen, Danny Ziyi Chen, Yinhe Han, Xiaobo Sharon Hu
2018	A	`conf`	Computing with ferroelectric FETs: Devices, models, systems, and applications. DATE Ahmedullah Aziz, Evelyn T. Breyer, An Chen, Xiaoming Chen, Suman Datta, Sumeet Kumar Gupta, Michael Hoffmann, Xiaobo Sharon Hu, Adrian M. Ionescu, Matthew Jerry, Thomas Mikolajick, Halid Mulaosmanovic, Kai Ni, Michael T. Niemier, Ian O'Connor, Atanu Saha, Stefan Slesazeck, Sandeep Krishna Thirumala, Xunzhao Yin
2018	A*	`conf`	Dadu-P: a scalable accelerator for robot motion planning in a dynamic environment. DAC Shiqi Lian, Yinhe Han, Xiaoming Chen, Ying Wang, Hang Xiao
2018	A	`conf`	Design and optimization of FeFET-based crossbars for binary convolution neural networks. DATE Xiaoming Chen, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu
2018	J	`jnl`	Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoming Chen, Qiaoyi Liu, Song Yao, Jia Wang, Qiang Xu, Yu Wang, Yongpan Liu, Huazhong Yang
2018	A*	`conf`	Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification. DAC Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang
2018	A	`conf`	Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method. ICCAD Zhenhua Zhu, Jilan Lin, Ming Cheng, Lixue Xia, Hanbo Sun, Xiaoming Chen, Yu Wang, Huazhong Yang
2018	A	`conf`	Model-based and data-driven approaches for building automation and control. ICCAD Tianshu Wei, Xiaoming Chen, Xin Li, Qi Zhu
2018	C	`conf`	Nonvolatile Lookup Table Design Based on Ferroelectric Field-Effect Transistors. ISCAS Xiaoming Chen, Michael T. Niemier, Xiaobo Sharon Hu
2018	A	`conf`	Rescuing memristor-based computing with non-linear resistance levels. DATE Jilan Lin, Lixue Xia, Zhenhua Zhu, Hanbo Sun, Yi Cai, Hui Gao, Ming Cheng, Xiaoming Chen, Yu Wang, Huazhong Yang
2018	A	`conf`	moDNN: Memory optimal DNN training on GPUs. DATE Xiaoming Chen, Danny Z. Chen, Xiaobo Sharon Hu
2017	J	`jnl`	A Deep Learning Approach for Blind Drift Calibration of Sensor Networks. CoRR Yuzhi Wang, Anqi Yang, Xiaoming Chen, Pengjun Wang, Yu Wang, Huazhong Yang
2017	J	`jnl`	A General Framework for Hardware Trojan Detection in Digital Circuits by Statistical Learning Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoming Chen, Lin Wang, Yu Wang, Yongpan Liu, Huazhong Yang
2017	—	`conf`	Low-overhead implementation of logic encryption using gate replacement techniques. ISQED Xiaoming Chen, Qiaoyi Liu, Yu Wang, Qiang Xu, Huazhong Yang
2017	A*	`conf`	Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs. DAC Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu
2017	J	`jnl`	Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs. CoRR Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu
2016	J	`jnl`	A Unified Methodology for Designing Hardware Random Number Generators Based on Any Probability Distribution. IEEE Trans. Circuits Syst. II Express Briefs Xiaoming Chen, Boxun Li, Yu Wang, Yongpan Liu, Huazhong Yang
2016	J	`jnl`	Modeling Random Telegraph Noise as a Randomness Source and its Application in True Random Number Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoming Chen, Lin Wang, Boxun Li, Yu Wang, Xin Li, Yongpan Liu, Huazhong Yang
2016	—	`conf`	Overview of cyber-physical temperature estimation in smart buildings: From modeling to measurements. INFOCOM Workshops Xiaoming Chen, Xin Li, Sheldon X.-D. Tan
2016	A	`conf`	Sparsity-oriented sparse solver design for circuit simulation. DATE Xiaoming Chen, Lixue Xia, Yu Wang, Huazhong Yang
2016	C	`conf`	Virtual temperature measurement for smart buildings via Bayesian model fusion. ISCAS Xiaoming Chen, Xin Li
2015	A*	`conf`	A STT-RAM-based low-power hybrid register file for GPGPUs. DAC Gushu Li, Xiaoming Chen, Guangyu Sun, Henry Hoffmann, Yongpan Liu, Yu Wang, Huazhong Yang
2015	A	`conf`	A fast parallel sparse solver for SPICE-based circuit simulators. DATE Xiaoming Chen, Yu Wang, Huazhong Yang
2015	A	`conf`	FASTrust: Feature analysis for third-party IP trust verification. ITC Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu, Yu Wang, Huazhong Yang
2015	A	`conf`	From Robust Chip to Smart Building: CAD Algorithms and Methodologies for Uncertainty Analysis of Building Performance. ICCAD Xiaoming Chen, Xin Li, Sheldon X.-D. Tan
2015	J	`jnl`	GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling. IEEE Trans. Parallel Distributed Syst. Xiaoming Chen, Ling Ren, Yu Wang, Huazhong Yang
2015	J	`jnl`	HS3-DPG: Hierarchical Simulation for 3-D P/G Network. IEEE Trans. Very Large Scale Integr. Syst. Yu Wang, Song Yao, Shuai Tao, Xiaoming Chen, Yuchun Ma, Yiyu Shi, Huazhong Yang
2014	—	`conf`	Efficient region-aware P/G TSV planning for 3D ICs. ISQED Song Yao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yuan Xie, Huazhong Yang
2014	A*	`conf`	Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs. DAC Xiaoming Chen, Yu Wang, Yun Liang, Yuan Xie, Huazhong Yang
2014	—	`conf`	Statistical analysis of random telegraph noise in digital circuits. ASP-DAC Xiaoming Chen, Yu Wang, Yu Cao, Huazhong Yang
2013	J	`jnl`	Assessment of Circuit Optimization Techniques Under NBTI. IEEE Des. Test Xiaoming Chen, Yu Wang, Huazhong Yang, Yuan Xie, Yu Cao
2013	J	`jnl`	Evaluation and mitigation of performance degradation under random telegraph noise for digital circuits. IET Circuits Devices Syst. Xiaoming Chen, Hong Luo, Yu Wang, Yu Cao, Yuan Xie, Yuchun Ma, Huazhong Yang
2013	—	`conf`	HS3DPG: Hierarchical simulation for 3D P/G network. ASP-DAC Shuai Tao, Xiaoming Chen, Yu Wang, Yuchun Ma, Yiyu Shi, Hui Wang, Huazhong Yang
2013	J	`jnl`	NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaoming Chen, Yu Wang, Huazhong Yang
2013	—	`conf`	Nonzero pattern analysis and memory access optimization in GPU-based sparse LU factorization for circuit simulation. IA3@SC Xiaoming Chen, Du Su, Yu Wang, Huazhong Yang
2012	—	`conf`	An adaptive LU factorization algorithm for parallel circuit simulation. ASP-DAC Xiaoming Chen, Yu Wang, Huazhong Yang
2012	—	`conf`	Parallel Circuit Simulation on Multi/Many-core Systems. IPDPS Workshops Xiaoming Chen, Yu Wang, Huazhong Yang
2012	A*	`conf`	Sparse LU factorization for parallel circuit simulation on GPU. DAC Ling Ren, Xiaoming Chen, Yu Wang, Chenxi Zhang, Huazhong Yang
2012	J	`jnl`	Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization. IEEE Trans. Very Large Scale Integr. Syst. Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang
2011	J	`jnl`	An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation. IEEE Trans. Circuits Syst. II Express Briefs Xiaoming Chen, Wei Wu, Yu Wang, Hao Yu, Huazhong Yang
2011	—	`conf`	Circuit-level delay modeling considering both TDDB and NBTI. ISQED Hong Luo, Xiaoming Chen, Jyothi Velamala, Yu Wang, Yu Cao, Vikas Chandra, Yuchun Ma, Huazhong Yang
2011	—	`conf`	FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations. ARC Wei Wu, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang
2011	J	`jnl`	Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques. IEEE Trans. Very Large Scale Integr. Syst. Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang
2009	A	`conf`	Gate replacement techniques for simultaneous leakage and aging optimization. DATE Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang
2009	—	`conf`	On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang
2009	—	`conf`	On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise. ISVLSI Yan Xu, Weichen Liu, Yu Wang, Jiang Xu, Xiaoming Chen, Huazhong Yang
2009	A	`conf`	Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. ISLPED Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang