Xiaoling Yi

25 papers A* 2A 3C 3Journal 12Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access.
CoRR
Xiaoling Yi, Ryan Antonio, Yunhao Deng, Fanchen Kong, Joren Dumoulin, Jun Yin, Marian Verhelst
2026 J jnl
An Analytical Model for Performance-Carbon Co-Optimization of Edge AI Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jiacong Sun, Xiaoling Yi, Arne Symons, Georges G. E. Gielen, Lieven Eeckhout, Marian Verhelst
2026 J jnl
Fine-Grained Classification for Depth Estimation From Monocular Microscopy for Robotic Micromanipulation of Motile Cells.
IEEE Robotics Autom. Lett.
Han Yang, Yufei Jin, Aojun Jiang, Xinrui Wang, Xibu Wang, Xiaoling Yi, Yu Sun, Zhuoran Zhang
2026 — conf
Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration.
ASP-DAC
Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst
2026 — conf
The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead.
ASPLOS (1)
Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst
2025 A conf
An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems.
ISLPED
Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst
2025 J jnl
An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems.
CoRR
Ryan Antonio, Joren Dumoulin, Xiaoling Yi, Josse Van Delm, Yunhao Deng, Guilherme Paim, Marian Verhelst
2025 A* conf
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators.
DAC
Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
2025 J jnl
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators.
CoRR
Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
2025 A conf
Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning.
ISLPED
Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst
2025 J jnl
Efficient Precision-Scalable Hardware for Microscaling (MX) Processing in Robotics Learning.
CoRR
Stef Cuyckens, Xiaoling Yi, Nitish Satya Murthy, Chao Fang, Marian Verhelst
2025 — conf
Flexible Hardware Accelerators for Ultra-Low Power Edge AI: The CONVOLVE Approach.
ISVLSI
Panagiotis Chaidos, Alexios Maras, Georgios Alexandris, Xiaoling Yi, Asmae El Arrassi, Bas Ahn, James D. Garside, Yunhao Deng, Theofilos Spyrou, Anteneh Gebregiorgis, Mottaqiallah Taouil, Manil Dev Gomony, Sotirios Xydis, Marian Verhelst, Said Hamdioui, Dimitrios Soudris, Henk Corporaal
2025 — conf
OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling.
ASP-DAC
Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst
2025 J jnl
Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integration.
CoRR
Stef Cuyckens, Xiaoling Yi, Robin Geens, Joren Dumoulin, Martin Wiesner, Chao Fang, Marian Verhelst
2025 J jnl
Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zheng Wu, Jinyi Shen, Xiaoling Yi, Li Shang, Fan Yang, Xuan Zeng
2025 J jnl
The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead.
CoRR
Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst
2025 J jnl
Torrent: A Distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement.
CoRR
Yunhao Deng, Fanchen Kong, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2025 C conf
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs.
ICCD
Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2025 J jnl
XDMA: A Distributed, Extensible DMA Architecture for Layout-Flexible Data Movements in Heterogeneous Multi-Accelerator SoCs.
CoRR
Fanchen Kong, Yunhao Deng, Xiaoling Yi, Ryan Antonio, Marian Verhelst
2024 J jnl
OpenGeMM: A High-Utilization GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling.
CoRR
Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Paim, Marian Verhelst
2024 A conf
SenseDSE: Sensitivity-Based Performance Evaluation for Design Space Exploration of Microarchitecture.
DATE
Zheng Wu, Xiaoling Yi, Li Shang, Fan Yang
2023 A* conf
Graph Representation Learning for Microarchitecture Design Space Exploration.
DAC
Xiaoling Yi, Jialin Lu, Xiankui Xiong, Dong Xu, Li Shang, Fan Yang
2023 — conf
TPNoC: An Efficient Topology Reconfigurable NoC Generator.
ACM Great Lakes Symposium on VLSI
Jiangnan Yu, Fan Yang, Xiaoling Yi, Chixiao Chen, Jun Tao, Dong Xu, Xiankui Xiong, Haitao Yang
2022 C conf
An Automated Compiler for RISC-V Based DNN Accelerator.
ISCAS
Zheng Wu, Wuzhen Xie, Xiaoling Yi, Haitao Yang, Ruiyao Pu, Xiankui Xiong, Haidong Yao, Chixiao Chen, Jun Tao, Fan Yang
2022 C conf
NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models.
ISCAS
Xiaoling Yi, Jiangnan Yu, Zheng Wu, Xiankui Xiong, Dong Xu, Chixiao Chen, Jun Tao, Fan Yang