Xiaoji Ye

17 papers A* 4A 5Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2011 J jnl
Hierarchical Multialgorithm Parallel Circuit Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
2010 — conf
Accurate clock mesh sizing via sequential quadraticprogramming.
ISPD
Venkata Rajesh Mekala, Yifang Liu, Xiaoji Ye, Jiang Hu, Peng Li
2010 J jnl
Exact Time-Domain Second-Order Adjoint-Sensitivity Computation for Linear Circuit Analysis and Optimization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaoji Ye, Peng Li, Frank Ying Liu
2010 A conf
On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation.
ICCAD
Xiaoji Ye, Peng Li
2010 A* conf
Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation.
DAC
Xiaoji Ye, Peng Li
2010 J jnl
Scalable Analysis of Mesh-Based Clock Distribution Networks Using Application-Specific Reduced Order Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jiang Hu
2010 A* conf
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation.
DAC
Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li
2009 — conf
An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation.
ISQED
Xiaoji Ye, Peng Li
2009 A conf
Leveraging efficient parallel pattern search for clock mesh optimization.
ICCAD
Xiaoji Ye, Srinath Narasimhan, Peng Li
2008 — conf
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding.
ISQED
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jiang Hu
2008 A conf
MAPS: multi-algorithm parallel circuit simulation.
ICCAD
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
2008 A* conf
WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines.
DAC
Wei Dong, Peng Li, Xiaoji Ye
2007 A conf
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding.
ICCAD
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jiang Hu
2007 — conf
Efficient Frequency-Domain Simulation of Massive Clock Meshes Using Parallel Harmonic Balance.
CICC
Wei Dong, Peng Li, Xiaoji Ye
2007 J jnl
Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoji Ye, Frank Liu, Peng Li
2007 A* conf
Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization.
DAC
Xiaoji Ye, Yaping Zhan, Peng Li
2006 A conf
Practical variation-aware interconnect delay and slew analysis for statistical timing verification.
ICCAD
Xiaoji Ye, Peng Li, Frank Liu