Xiaodie Pu

24 papers C 1Journal 10Unranked 13
YearRankTypeTitle / Venue / Authors
2025 J jnl
J. Comput. Inf. Syst.
Bowen Zheng, Xiaodie Pu, Alain Yee-Loong Chong, Zhao Cai
2024 conf
PACIS
Xiaodie Pu, Tanguy Tresor Sindihebura, Shiying Zheng, Chee-Wee Tan
2024 conf
PACIS
Tanguy Tresor Sindihebura, Xiaodie Pu, Vincent Kuo, Jin Chen
2023 J jnl
ACM Trans. Manag. Inf. Syst.
Xiao Zeng, David Ji, Dimple R. Thadani, Boying Li, Xiaodie Pu, Zhao Cai, Patrick Y. K. Chau
2023 conf
AMCIS
Shiying Zheng, Tanguy Tresor Sindihebura, Xiaodie Pu, Boying Li, Alain Yee-Loong Chong
2023 conf
AMCIS
Tanguy Tresor Sindihebura, Xiaodie Pu, Vincent Kuo, Jin Chen
2023 C conf
ICIS
Xiaodie Pu, Tanguy Tresor Sindihebura, Yue Guo, Alain Chong
2022 conf
AMCIS
Shiying Zheng, Xiaodie Pu, Jin Chen, Alain Yee-Loong Chong
2022 conf
PACIS
Tanguy Tresor Sindihebura, Xiaodie Pu, Jin Chen
2020 J jnl
Ind. Manag. Data Syst.
Xiaodie Pu, Zhengxu Wang, Felix T. S. Chan
2020 conf
PACIS
Shiying Zheng, Xiaodie Pu, Jin Chen, Jiatao Li, Alain Yee-Loong Chong
2020 conf
PACIS
Xiaodie Pu, Teng Ma, Shiying Zheng, Alain Yee-Loong Chong, Jie Yu
2020 J jnl
Ind. Manag. Data Syst.
Wen-Lung Shiau, Xiaodie Pu, Soumya Ray, Charlie C. Chen
2020 J jnl
J. Comput. Inf. Syst.
Xiaodie Pu, Zhengxu Wang, Felix Tung Sun Chan
2020 J jnl
Eur. J. Oper. Res.
Truong Van Nguyen, Li Zhou, Alain Yee-Loong Chong, Boying Li, Xiaodie Pu
2020 J jnl
Int. J. Mob. Commun.
Xiaodie Pu, Felix T. S. Chan, Alain Yee-Loong Chong, Ben Niu
2020 J jnl
Ind. Manag. Data Syst.
Wen-Lung Shiau, Ye Yuan, Xiaodie Pu, Soumya Ray, Charlie C. Chen
2019 conf
PACIS
Xiaodie Pu, Zayyad Tsiga, Boying Li
2018 J jnl
Ind. Manag. Data Syst.
Xiaodie Pu, Felix T. S. Chan, Zayyad Danlami Tsiga, Ben Niu
2018 J jnl
Ind. Manag. Data Syst.
Alfred Bo Shing Lee, Felix T. S. Chan, Xiaodie Pu
2018 conf
CONF-IRM
Xiaodie Pu, Felix T. S. Chan
2017 conf
PACIS
Zayyad Danlami Tsiga, Alain Yee-Loong Chong, Xiaodie Pu, Pei-Lee Teh
2017 conf
PACIS
Boying Li, Fangfang Hou, Zhengzhi Guan, Alain Yee-Loong Chong, Xiaodie Pu
2016 conf
PACIS
Xiaodie Pu, Felix T. S. Chan, Alain Yee-Loong Chong
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False