Xiaocong Jin

18 papers A* 8A 1Journal 8Unranked 1
YearRankTypeTitle / Venue / Authors
2024 J jnl
Multim. Tools Appl.
Tongguan Wang, Yang Xiao, Yuxi Cai, Guxue Gao, Xiaocong Jin, Liejun Wang, Huicheng Lai
2018 J jnl
IEEE/ACM Trans. Netw.
Xiaocong Jin, Yanchao Zhang
2018 J jnl
IEEE Trans. Mob. Comput.
Xiaocong Jin, Jingchao Sun, Rui Zhang, Yanchao Zhang, Chi Zhang
2017 A* conf
INFOCOM
Yimin Chen, Xiaocong Jin, Jingchao Sun, Rui Zhang, Yanchao Zhang
2017 A* conf
INFOCOM
Yimin Chen, Jingchao Sun, Xiaocong Jin, Tao Li, Rui Zhang, Yanchao Zhang
2016 A* conf
CCS
Xiaocong Jin, Rui Zhang, Yimin Chen, Tao Li, Yanchao Zhang
2016 A* conf
INFOCOM
Xiaocong Jin, Yanchao Zhang
2016 J jnl
IEEE Trans. Wirel. Commun.
Jingchao Sun, Rui Zhang, Xiaocong Jin, Yanchao Zhang
2016 A* conf
NDSS
Jingchao Sun, Xiaocong Jin, Yimin Chen, Jinxue Zhang, Yanchao Zhang, Rui Zhang
2016 A* conf
CCS
Tao Li, Yimin Chen, Jingchao Sun, Xiaocong Jin, Yanchao Zhang
2015 A* conf
CCS
Xiaocong Jin, Jingchao Sun, Rui Zhang, Yanchao Zhang
2015 J jnl
CoRR
Jingchao Sun, Rui Zhang, Xiaocong Jin, Yanchao Zhang
2015 A* conf
INFOCOM
Xiaocong Jin, Jingchao Sun, Rui Zhang, Yanchao Zhang, Chi Zhang
2014 J jnl
IEEE Trans. Wirel. Commun.
Xiaocong Jin, Rui Zhang, Jingchao Sun, Yanchao Zhang
2011 A conf
ICME
Xiaocong Jin, Jun Sun, Jun Zhou, Yiqing Huang, Jia Su, Takeshi Ikenaga
2011 J jnl
IEICE Trans. Inf. Syst.
Xiaocong Jin, Jun Sun, Yiqing Huang, Jia Su, Takeshi Ikenaga
2011 J jnl
IEICE Trans. Electron.
Yiqing Huang, Xiaocong Jin, Jin Zhou, Jia Su, Takeshi Ikenaga
2011 conf
MMM (1)
Jia Su, Xin Wei, Xiaocong Jin, Takeshi Ikenaga
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False