Xiaobing Pei

58 papers A* 2B 6C 2Misc 1Journal 39Unranked 8
YearRankTypeTitle / Venue / Authors
2026 A* conf
WWW
Jiahao Zhang, Xiaobing Pei, Zhaokun Zhong, Wenqiang Hao, Zhenghao Tang
2025 B conf
TrustCom
Mengkun Zhao, Jing Liu, Wenqiang Hao, Xiaobing Pei
2025 J jnl
CoRR
Jiahao Zhang, Xiaobing Pei, Zhaokun Zhong, Wenqiang Hao, Zhenghao Tang
2025 J jnl
Appl. Soft Comput.
Yizhen Li, Chundong Zheng, Xiaobing Pei
2025 B conf
IJCNN
Rongping Ye, Xiaobing Pei, Ruiqi Wang
2025 J jnl
CoRR
Yidi Wang, Jiawei Gu, Xiaobing Pei, Xubin Zheng, Xiao Luo, Pengyang Wang, Ziyue Qiao
2025 J jnl
CoRR
Mingwei Zhou, Xiaobing Pei
2024 J jnl
Comput. Ind. Eng.
Wenbo Qi, Xiaobing Pei, Heng Zhao
2024 J jnl
CoRR
Kai Yuan, Xiaobing Pei, Haoran Yang
2024 J jnl
Mach. Learn.
Haoxi Zhan, Xiaobing Pei
2024 J jnl
CoRR
Aijia Liu, Shiqing Liu, Xiaobing Pei
2024 conf
ICCT
Aijia Liu, Shiqing Liu, Xiaobing Pei
2024 J jnl
IEEE Trans. Emerg. Top. Comput. Intell.
Yidi Wang, Xiaobing Pei, Haoxi Zhan
2024 J jnl
CoRR
Xiaobing Pei, Rongping Ye, Haoran Yang, Ruiqi Wang
2024 J jnl
CoRR
Haoran Yang, Xiaobing Pei, Kai Yuan
2024 J jnl
CoRR
Rongping Ye, Xiaobing Pei
2024 J jnl
CoRR
Yingying He, Xiaobing Pei, Lihong Shen
2024 A* conf
ACM Multimedia
Minghui Li, Jiangxiong Wang, Hao Zhang, Ziqi Zhou, Shengshan Hu, Xiaobing Pei
2024 J jnl
CoRR
Minghui Li, Jiangxiong Wang, Hao Zhang, Ziqi Zhou, Shengshan Hu, Xiaobing Pei
2023 J jnl
Appl. Intell.
He Tang, Xiaobing Pei, Xinzhe Li, Haihui Tong, Xin Li, Shilong Huang
2023 J jnl
CoRR
Xiaobing Pei, Haoran Yang, Gang Shen
2022 J jnl
Briefings Bioinform.
Min Dai, Xiaobing Pei, Xiu-Jie Wang
2022 B conf
TrustCom
Qichang Wan, Peisen Wang, Xiaobing Pei
2022 J jnl
CoRR
Yidi Wang, Xiaobing Pei, Haoxi Zhan
2022 J jnl
Multim. Tools Appl.
Lin Wan, Chengbin Dong, Xiaobing Pei
2022 J jnl
CoRR
Mingwei Zhou, Xiaobing Pei
2021 J jnl
CoRR
Haoxi Zhan, Xiaobing Pei
2021 B conf
DS
Haoxi Zhan, Xiaobing Pei
2021 B conf
NSS
Ruiyuan Li, Zehui Song, Wei Xie, Chengwei Zhang, Guohui Zhong, Xiaobing Pei
2021 B conf
WCNC
Wei Wan, Jianrong Lu, Shengshan Hu, Leo Yu Zhang, Xiaobing Pei
2020 J jnl
IEEE Access
He Tang, Xiaobing Pei, Shilong Huang, Xin Li, Chao Liu
2020 J jnl
CoRR
Haoxi Zhan, Xiaobing Pei
2019 J jnl
CoRR
He Tang, Xiaobing Pei, Shilong Huang, Xin Li, Chao Liu
2019 J jnl
IEEE Access
Xiaobing Pei, Junjun Zou, Weiya Chen
2019 J jnl
IEEE Access
Xiaobing Pei, Tao Dong, Yue Guan
2018 J jnl
IEEE Trans. Neural Networks Learn. Syst.
Xiaobing Pei, Chuanbo Chen, Weihua Gong
2018 J jnl
IEEE Access
Xiaobing Pei, Yue Guan, Pingping Cai, Tao Dong
2018 J jnl
Multim. Tools Appl.
He Tang, Chuanbo Chen, Xiaobing Pei
2017 J jnl
Vis. Comput.
Jun Shang, Chuanbo Chen, Xiaobing Pei, Hu Liang, He Tang, Mudar Sarem
2017 J jnl
IEEE Trans. Neural Networks Learn. Syst.
Xiaobing Pei, Chuanbo Chen, Yue Guan
2017 J jnl
Multidimens. Syst. Signal Process.
Xiaobing Pei, Yuntao Wu
2017 J jnl
Comput. Electr. Eng.
Zehua Lyu, Xuping Tu, Xiaobing Pei, Hu Liang, Mudar Sarem
2016 J jnl
Circuits Syst. Signal Process.
Chuanbo Chen, Hu Liang, Shengrong Zhao, Zehua Lyu, Shaohong Fang, Xiaobing Pei
2016 J jnl
IEEE Signal Process. Lett.
He Tang, Chuanbo Chen, Xiaobing Pei
2015 J jnl
IEEE Trans. Cybern.
Xiaobing Pei, Zehua Lyu, Changqing Chen, Chuanbo Chen
2015 J jnl
J. Electronic Imaging
Jun Shang, Chuanbo Chen, Xiaobing Pei, Hu Liang, He Tang, Mudar Sarem
2015 conf
FSKD
Xiaobing Pei, Changqing Chen, Weihua Gong
2015 conf
FSKD
Xiaobing Pei, Changqing Chen, Weihua Gong
2014 J jnl
IEEE Trans. Cybern.
Xiaobing Pei, Tao Wu, Chuanbo Chen
2013 J jnl
J. Netw. Comput. Appl.
Tao Wu, Xiaobing Pei, Yongzhong Lu, Changqing Chen, Liang Gao
2013 conf
FSKD
Xiaobing Pei, Tao Wu
2013 Misc conf
GrC
Xiaobing Pei, Zehua Lv, Changqing Chen
2012 C conf
CSCWD
Tao Wu, Ke Lin, Jianjie Wu, Xiaobing Pei, Qiang Peng
2010 conf
FSKD
Xiaobing Pei, Shaohong Fang, Chuanbo Chen
2010 conf
ICEE
Wenting Tang, Xiaobing Pei
2008 conf
CSSE (4)
Yunsheng Liu, Tian Bai, Xin Liu, Xiaobing Pei
2005 conf
FSKD (1)
Xiaobing Pei, Yuanzhen Wang
2005 C conf
IDEAL
Xiaobing Pei, Yuanzhen Wang
redb/extractors/decompiler/bninja/arch/x86.py
← Index redb/extractors/decompiler/bninja/arch/x86.py python
from binaryninja.enums import (
    InstructionTextTokenType,
)

# Support both package and standalone imports
try:
    from .architecture import Architecture
except ImportError:
    # Fallback to absolute imports (for multiprocessing spawned processes)
    from redb.extractors.decompiler.bninja.arch.architecture import Architecture


class Arch_x86(Architecture):
    """The concrete class for architecture-dependent details for x86_64"""

    def __init__(self):
        # general purpose registers for 64bits
        self.gpr_64 = [
            "RAX",
            "RBX",
            "RCX",
            "RDX",
            "RSI",
            "RDIR9",
            "R10",
            "R11",
            "R12",
            "R13",
            "R14",
            "R15",
        ]

        self.gpr_32 = [
            "EAX",
            "EBX",
            "ECX",
            "EDX",
            "ESI",
            "EDI",
            "R8D",
            "R9D",
            "R10D",
            "R11D",
            "R12D",
            "R13D",
            "R14D",
            "R15D",
        ]

        self.gpr_16 = [
            "AX",
            "BX",
            "CX",
            "DX",
            "SI",
            "DI",
            "R8W",
            "R9W",
            "R10W",
            "R11W",
            "R12W",
            "R13W",
            "R14W",
            "R15W",
        ]

        self.gpr_8 = [
            "AL",
            "BL",
            "CL",
            "DL",
            "SIL",
            "DIL",
            "R8B",
            "R9B",
            "R10B",
            "R11B",
            "R12B",
            "R13B",
            "R14B",
            "R15B",
        ]

        self.fpu_x87 = ["ST0", "ST1", "ST2", "ST3", "ST4", "ST5", "ST6", "ST7"]

        self.sse_xmm = [
            "XMM0",
            "XMM1",
            "XMM2",
            "XMM3",
            "XMM4",
            "XMM5",
            "XMM6",
            "XMM7",
            "XMM8",
            "XMM9",
            "XMM10",
            "XMM11",
            "XMM12",
            "XMM13",
            "XMM14",
            "XMM15",
        ]

        self.avx_ymm = [
            "YMM0",
            "YMM1",
            "YMM2",
            "YMM3",
            "YMM4",
            "YMM5",
            "YMM6",
            "YMM7",
            "YMM8",
            "YMM9",
            "YMM10",
            "YMM11",
            "YMM12",
            "YMM13",
            "YMM14",
            "YMM15",
        ]
        self.flags = ["FLAGS", "EFLAGS", "RFLAGS"]
        self.stack_registers = ["RBP", "RSP", "SP", "BP"]
        self.size = 8
        self.global_registers = (
            self.gpr_64
            + self.gpr_32
            + self.gpr_16
            + self.gpr_8
            + self.fpu_x87
            + self.sse_xmm
            + self.avx_ymm
        )
        self.opcode_categories = self._initialize_opcode_categories()

        ## instructions
        self.instructions = []

    def is_register(self, register):
        register = register.upper()
        return register in self.global_registers

    def is_general_purpose_register(self, register):
        register = register.upper()
        return (
            register in self.gpr_64
            or register in self.gpr_32
            or register in self.gpr_16
            or register in self.gpr_8
        )

    def is_stack_register(self, register):
        register = register.upper()
        return register in self.stack_registers

    def is_xmm_register(self, register):
        register = register.upper()
        return register in self.sse_xmm

    def is_control_flow(self, instr_tokens):
        return False

    def is_control_flow_instruction(self, instr_tokens):
        """Check if an instruction is a control flow instruction (jump, call, return, loop)."""
        try:
            # Extract the mnemonic from the instruction tokens
            mnemonic = None
            for token in instr_tokens:
                if token.type == InstructionTextTokenType.InstructionToken:
                    mnemonic = token.text.upper()
                    break

            if not mnemonic:
                return False

            # Check if it's a jump, call, return, or loop instruction
            return (
                mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
                or mnemonic == "CALL"  # Function calls
                or mnemonic == "RET"  # Return
                or mnemonic == "RETN"  # Another form of return
                or mnemonic.startswith("LOOP")
            )  # Loop instructions

        except Exception as e:
            print(e)
            # If we can't determine, assume it's not a control flow instruction
            return False

    def is_control_flow_instruction_by_mnemonic(self, mnemonic):
        """Check if an instruction is a control flow instruction based on its mnemonic."""
        if not mnemonic:
            return False

        mnemonic = mnemonic.upper()
        return (
            mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
            or mnemonic == "CALL"  # Function calls
            or mnemonic == "RET"  # Return
            or mnemonic == "RETN"  # Another form of return
            or mnemonic.startswith("LOOP")
        )

    def _initialize_opcode_categories(self):
        """Initialize mapping of opcodes to categories similar to Ghidra's implementation."""
        opcode_categories = {}
        opcode_index = {}  # Add this to mimic Ghidra's opcodeIndex

        # Define common opcodes array similar to Ghidra's COMMON_OPCODES
        COMMON_OPCODES = [
            # Core instructions (tracked individually)
            "MOV",
            "PUSH",
            "POP",
            "LEA",
            "CALL",
            "RET",  # Data movement and control
            "ADD",
            "SUB",
            "MUL",
            "DIV",  # Basic arithmetic
            "AND",
            "OR",
            "XOR",
            "NOT",  # Logical operations
            "JMP",
            "JE",
            "JNE",  # Basic jumps
            "TEST",
            "CMP",  # Comparisons
            # Grouped categories (aggregated tracking)
            "SIMD_MOVE",  # MOVAPS, MOVDQA, MOVDQU, etc.
            "COND_JUMP_EXT",  # Other conditional jumps (JG, JL, JGE, etc.)
            "STRING_OP",  # MOVS, STOS, LODS, SCAS, CMPS
            "STACK_ADV",  # ENTER, LEAVE, PUSHA, POPA
            "ARITHMETIC_ADV",  # IMUL, IDIV, ADC, SBB
            "BIT_OP",  # SHL, SHR, SAR, ROL, ROR, etc.
            "FPU_OP",  # FLD, FST, FADD, etc.
            "SYSTEM_OP",  # SYSCALL, INT, SYSENTER
            "CRYPTO_OP",  # AES*, SHA* instructions
            "MISC_OP",  # Rare but interesting (CPUID, RDTSC, etc.)
        ]

        # Create index map like Ghidra
        for i, opcode in enumerate(COMMON_OPCODES):
            opcode_index[opcode] = i

        # Now categorize opcodes using if/elif/else structure like in Ghidra
        for opcode in COMMON_OPCODES:
            # String Operations (checking these first to avoid MOV confusion)
            if opcode.startswith("MOVS") or opcode in [
                "STOS",
                "LODS",
                "SCAS",
                "CMPS",
                "REP",
                "REPE",
                "REPNE",
            ]:
                opcode_categories[opcode] = "STRING_MANIPULATION"

            # Data Movement (after string ops to avoid MOVS confusion)
            elif opcode.startswith("MOV") or opcode in ["LEA", "XCHG"]:
                opcode_categories[opcode] = "DATA_MOVEMENT"

            # Stack Operations
            elif opcode in ["PUSH", "POP", "ENTER", "LEAVE", "PUSHA", "POPA"]:
                opcode_categories[opcode] = "STACK_MANAGEMENT"

            # Control Flow (non-conditional)
            elif opcode in ["JMP", "CALL", "RET"]:
                opcode_categories[opcode] = "CONTROL_FLOW"

            # Conditional Jumps and Loops
            elif opcode.startswith("J") or opcode.startswith("LOOP"):
                opcode_categories[opcode] = "CONDITIONAL_JUMP"

            # Arithmetic
            elif opcode in [
                "ADD",
                "SUB",
                "MUL",
                "DIV",
                "IMUL",
                "IDIV",
                "ADC",
                "SBB",
                "INC",
                "DEC",
                "NEG",
            ]:
                opcode_categories[opcode] = "ARITHMETIC"

            # Logical
            elif opcode in ["AND", "OR", "XOR", "NOT", "TEST", "CMP"]:
                opcode_categories[opcode] = "LOGICAL"

            # Shifts & Rotates
            elif opcode in ["SHL", "SHR", "SAR", "SAL", "ROL", "ROR", "RCL", "RCR"]:
                opcode_categories[opcode] = "SHIFT_ROTATE"

            # System & Interrupts
            elif opcode in [
                "SYSCALL",
                "INT",
                "SYSENTER",
                "SYSEXIT",
                "SGDT",
                "SIDT",
                "SLDT",
                "WRMSR",
                "RDMSR",
            ]:
                opcode_categories[opcode] = "SYSTEM_CALLS"

            # Floating Point
            elif opcode.startswith("F"):
                opcode_categories[opcode] = "FPU_ARITHMETIC"

            # System Information and Random Number Generation
            elif opcode in ["PUSHF", "POPF", "CPUID", "RDTSC", "RDRAND", "RDSEED"]:
                opcode_categories[opcode] = "CPU_FEATURES"

            # Cryptography
            elif opcode.startswith("AES") or opcode.startswith("SHA"):
                opcode_categories[opcode] = "CRYPTOGRAPHIC"

            # Miscellaneous (including flag operations)
            else:
                opcode_categories[opcode] = "MISC"

        # Additional categorization for opcodes not in COMMON_OPCODES
        # This can be used in the normalize_opcode method

        # Store both maps as instance variables
        # self.opcode_categories = opcode_categories
        self.opcode_index = opcode_index

        return opcode_categories

    def is_simd_register(self, register):
        return register in self.sse_xmm