Xiangyu Zhou

56 papers A* 3A 1B 1Misc 1Journal 37Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
J. Field Robotics
Jing Luo, Xiangyu Zhou, Yifan Zhu, Yu Li, Chaoyi Zhang, Keao Wang, Zhaohong Mai, Chao Zeng
2026 A* conf
AAAI
Yue Lu, Xiangyu Zhou, Shizhou Zhang, Yinghui Xing, Guoqiang Liang, Wencong Zhang
2026 J jnl
CoRR
Yue Lu, Xiangyu Zhou, Shizhou Zhang, Yinghui Xing, Guoqiang Liang, Wencong Zhang
2026 J jnl
IEEE Trans. Engineering Management
Li Hu, Zhuoran Ge, Xin Wen, Xiangyu Zhou
2026 J jnl
Eur. J. Oper. Res.
Li Hu, Qin Zhou, Li Wang, Xiangyu Zhou
2026 J jnl
Biomed. Signal Process. Control.
Binyue Cao, Mi He, Meiyun Zhao, Qinwen Ping, Chang He, Xiangyu Zhou, Yushun Gong
2026 J jnl
CoRR
Xiangyu Zhou, Chenhan Xiao, Yang Weng
2026 conf
CHI Extended Abstracts
Xiangyu Zhou, Steve Oney
2025 J jnl
IEEE Internet Things J.
Weijie Ge, Lingzhi Luo, Yaqing Yu, Xiangyu Zhou, Jingjing Liu, Jiang Wu
2025 J jnl
IEEE Robotics Autom. Lett.
Xiangyu Zhou, Shenghong Zhang, Xiao Li
2025 J jnl
IEEE Trans. Intell. Transp. Syst.
Xiangyu Zhou, Yong Ma, Jun Huang, Zhanchuan Cai, Yiming Zhu, Fan Fan
2025 A conf
IROS
Shenghong Zhang, Xiangyu Zhou, Xiao Li
2025 Misc conf
ICASSP
Ze Song, Dehong Chen, Xiaoyi Shen, Xiangyu Zhou, Ji Qi, Yi Zhou
2025 J jnl
CoRR
Xiaoqi Dong, Xiangyu Zhou, Nicholas Evans, Yujia Lin
2025 A* conf
ICDM
Xiangyu Zhou, Chenhan Xiao, Yang Weng
2025 J jnl
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens.
Xiangyu Zhou, Yuhui Zhang, Qian-Ru Wei
2025 J jnl
IEEE Trans. Geosci. Remote. Sens.
Yiming Zhu, Yong Ma, Fan Fan, Jun Huang, Yuan Yao, Xiangyu Zhou, Ruimin Huang
2024 J jnl
IEEE Access
Xinyue Guo, Qian Chen, Xiangyu Zhou, Minjia Chai, Zhixiang Huang, Lixia Yang, Yingsong Li
2024 J jnl
Proc. ACM Program. Lang.
Xiang Li, Xiangyu Zhou, Rui Dong, Yihong Zhang, Xinyu Wang
2024 J jnl
CoRR
Zeyu Wang, Weichen Dai, Xiangyu Zhou, Ji Qi, Yi Zhou
2024 J jnl
IEEE ACM Trans. Comput. Biol. Bioinform.
Yufei Li, Xiaoyong Ma, Xiangyu Zhou, Penghzhen Cheng, Kai He, Tieliang Gong, Chen Li
2024 conf
ICTA
Xiaohui Yuan, Linjie Liu, Xiangyu Zhou, Shijiao Xu, Chenxi Wang
2023 J jnl
Symmetry
Juxiang Wang, Si Li, Xiangyu Zhou
2023 J jnl
Symmetry
Juxiang Wang, Xiangyu Zhou, Si Li, Jianwei Hu
2023 conf
ICCPR
Baohua Qiang, Feng Tang, Xiangyu Zhou, Yuanchun Wang, Xianyi Yang, Kai Li
2023 J jnl
CoRR
Xiangyu Zhou, Qianru Wei, Yuhui Zhang
2023 J jnl
CoRR
Xiang Li, Xiangyu Zhou, Rui Dong, Yihong Zhang, Xinyu Wang
2023 conf
ICISCAE
Weishuai Wang, Haijing Zhang, Pan Jia, Xiangyu Zhou, Yankun Feng
2023 conf
CASE
Xiangyu Zhou, Guangbao Zhao, Yan Xing, Jianhua Wu, Zhenhua Xiong
2023 J jnl
Sensors
Xiangyu Zhou, Yifan Zhang, Di Liu, Qian-Ru Wei
2022 J jnl
BMC Medical Informatics Decis. Mak.
Yufei Li, Xiangyu Zhou, Jie Ma, Xiaoyong Ma, Pengzhen Cheng, Tieliang Gong, Chen Li
2022 J jnl
J. Enterp. Inf. Manag.
Qiang Lu, Jinliang Chen, Hua Song, Xiangyu Zhou
2022 J jnl
Sensors
Xiangyu Zhou, Yuhui Zhang, Qianru Wei
2022 conf
DTPI
Jing Li, Xiangyu Zhou, Tao Lin, Yue Liu, Qinghua Wu
2022 conf
BIBM
Kai He, Bing Mao, Xiangyu Zhou, Yufei Li, Tieliang Gong, Chen Li, Jialun Wu
2022 conf
DTPI
Xiangyu Zhou, Jing Li, Yao Meng, Wenxiu Dong, Hedong Zhang
2022 conf
CSAE
Xiangyu Zhou, Jing Li, Jiyan Liu, Qinghua Wu, Jie Huang
2022 J jnl
IEEE Access
Xiangyu Zhou, Zhongjie Xu, Xiangai Cheng, Zhongyang Xing
2022 J jnl
CoRR
Xiangyu Zhou, Rastislav Bodík, Alvin Cheung, Chenglong Wang
2022 A* conf
PLDI
Xiangyu Zhou, Rastislav Bodík, Alvin Cheung, Chenglong Wang
2021 J jnl
Sensors
Xiangyu Zhou, Shanjun Mao, Mei Li
2021 J jnl
Neurocomputing
Yong Fang, Xiangyu Zhou, Cheng Huang
2021 conf
ICGEC
Peng Chen, Baohua Qiang, Yufeng Wang, Chen Wang, Ruidong Chen, Baolian Li, Bo Peng, Xiangyu Zhou
2021 J jnl
Bioinform.
Yufei Li, Xiaoyong Ma, Xiangyu Zhou, Pengzhen Cheng, Kai He, Chen Li
2021 B conf
TrustCom
Genpei Liang, Xiangyu Zhou, Qingyu Wang, Yutong Du, Cheng Huang
2020 J jnl
IEEE Trans. Instrum. Meas.
Zhenyu Wu, Lijun Zhou, Tong Lin, Xiangyu Zhou, Dongyang Wang, Shibin Gao, Feiming Jiang
2020 J jnl
Int. J. Distributed Sens. Networks
Fan Shi, Pengcheng Zhu, Xiangyu Zhou, Bintao Yuan, Yong Fang
2020 J jnl
Sensors
Xiangyu Zhou, Zhengjiang Liu, Fengwu Wang, Yajuan Xie, Xuexi Zhang
2019 J jnl
IEEE Internet Things J.
Yong Cheng, Xiangyu Zhou, Shaohua Wan, Kim-Kwang Raymond Choo
2019 J jnl
IEEE Access
Yibing Li, Li Zou, Li Jiang, Xiangyu Zhou
2019 conf
ICBDT
Xiangyu Zhou, Qingqing Miao, Tao Lin, Lei Zhang, Jianquan Zhou
2016 J jnl
IEEE Access
Xiangyu Zhou, Yi Zhang
2016 J jnl
IEEE Trans. Ind. Electron.
Xiangyu Zhou, Weishan Chen, Junkao Liu
2016
Xiangyu Zhou
2016 J jnl
计算机科学
Xiangyu Zhou, Chunling Cheng, Yanying Yang
2015 conf
RTSI
Francesco Bertazzi, Stefano Dominici, Marco Mandurrino, Dipika Robidas, Xiangyu Zhou, Marco Vallone, Marco Calciati, Pierluigi Debernardi, Giovanni Verzellesi, Matteo Meneghini, Enrico Bellotti, Giovanni Ghione, Michele Goano
redb/extractors/decompiler/bninja/arch/x86.py
← Index redb/extractors/decompiler/bninja/arch/x86.py python
from binaryninja.enums import (
    InstructionTextTokenType,
)

# Support both package and standalone imports
try:
    from .architecture import Architecture
except ImportError:
    # Fallback to absolute imports (for multiprocessing spawned processes)
    from redb.extractors.decompiler.bninja.arch.architecture import Architecture


class Arch_x86(Architecture):
    """The concrete class for architecture-dependent details for x86_64"""

    def __init__(self):
        # general purpose registers for 64bits
        self.gpr_64 = [
            "RAX",
            "RBX",
            "RCX",
            "RDX",
            "RSI",
            "RDIR9",
            "R10",
            "R11",
            "R12",
            "R13",
            "R14",
            "R15",
        ]

        self.gpr_32 = [
            "EAX",
            "EBX",
            "ECX",
            "EDX",
            "ESI",
            "EDI",
            "R8D",
            "R9D",
            "R10D",
            "R11D",
            "R12D",
            "R13D",
            "R14D",
            "R15D",
        ]

        self.gpr_16 = [
            "AX",
            "BX",
            "CX",
            "DX",
            "SI",
            "DI",
            "R8W",
            "R9W",
            "R10W",
            "R11W",
            "R12W",
            "R13W",
            "R14W",
            "R15W",
        ]

        self.gpr_8 = [
            "AL",
            "BL",
            "CL",
            "DL",
            "SIL",
            "DIL",
            "R8B",
            "R9B",
            "R10B",
            "R11B",
            "R12B",
            "R13B",
            "R14B",
            "R15B",
        ]

        self.fpu_x87 = ["ST0", "ST1", "ST2", "ST3", "ST4", "ST5", "ST6", "ST7"]

        self.sse_xmm = [
            "XMM0",
            "XMM1",
            "XMM2",
            "XMM3",
            "XMM4",
            "XMM5",
            "XMM6",
            "XMM7",
            "XMM8",
            "XMM9",
            "XMM10",
            "XMM11",
            "XMM12",
            "XMM13",
            "XMM14",
            "XMM15",
        ]

        self.avx_ymm = [
            "YMM0",
            "YMM1",
            "YMM2",
            "YMM3",
            "YMM4",
            "YMM5",
            "YMM6",
            "YMM7",
            "YMM8",
            "YMM9",
            "YMM10",
            "YMM11",
            "YMM12",
            "YMM13",
            "YMM14",
            "YMM15",
        ]
        self.flags = ["FLAGS", "EFLAGS", "RFLAGS"]
        self.stack_registers = ["RBP", "RSP", "SP", "BP"]
        self.size = 8
        self.global_registers = (
            self.gpr_64
            + self.gpr_32
            + self.gpr_16
            + self.gpr_8
            + self.fpu_x87
            + self.sse_xmm
            + self.avx_ymm
        )
        self.opcode_categories = self._initialize_opcode_categories()

        ## instructions
        self.instructions = []

    def is_register(self, register):
        register = register.upper()
        return register in self.global_registers

    def is_general_purpose_register(self, register):
        register = register.upper()
        return (
            register in self.gpr_64
            or register in self.gpr_32
            or register in self.gpr_16
            or register in self.gpr_8
        )

    def is_stack_register(self, register):
        register = register.upper()
        return register in self.stack_registers

    def is_xmm_register(self, register):
        register = register.upper()
        return register in self.sse_xmm

    def is_control_flow(self, instr_tokens):
        return False

    def is_control_flow_instruction(self, instr_tokens):
        """Check if an instruction is a control flow instruction (jump, call, return, loop)."""
        try:
            # Extract the mnemonic from the instruction tokens
            mnemonic = None
            for token in instr_tokens:
                if token.type == InstructionTextTokenType.InstructionToken:
                    mnemonic = token.text.upper()
                    break

            if not mnemonic:
                return False

            # Check if it's a jump, call, return, or loop instruction
            return (
                mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
                or mnemonic == "CALL"  # Function calls
                or mnemonic == "RET"  # Return
                or mnemonic == "RETN"  # Another form of return
                or mnemonic.startswith("LOOP")
            )  # Loop instructions

        except Exception as e:
            print(e)
            # If we can't determine, assume it's not a control flow instruction
            return False

    def is_control_flow_instruction_by_mnemonic(self, mnemonic):
        """Check if an instruction is a control flow instruction based on its mnemonic."""
        if not mnemonic:
            return False

        mnemonic = mnemonic.upper()
        return (
            mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
            or mnemonic == "CALL"  # Function calls
            or mnemonic == "RET"  # Return
            or mnemonic == "RETN"  # Another form of return
            or mnemonic.startswith("LOOP")
        )

    def _initialize_opcode_categories(self):
        """Initialize mapping of opcodes to categories similar to Ghidra's implementation."""
        opcode_categories = {}
        opcode_index = {}  # Add this to mimic Ghidra's opcodeIndex

        # Define common opcodes array similar to Ghidra's COMMON_OPCODES
        COMMON_OPCODES = [
            # Core instructions (tracked individually)
            "MOV",
            "PUSH",
            "POP",
            "LEA",
            "CALL",
            "RET",  # Data movement and control
            "ADD",
            "SUB",
            "MUL",
            "DIV",  # Basic arithmetic
            "AND",
            "OR",
            "XOR",
            "NOT",  # Logical operations
            "JMP",
            "JE",
            "JNE",  # Basic jumps
            "TEST",
            "CMP",  # Comparisons
            # Grouped categories (aggregated tracking)
            "SIMD_MOVE",  # MOVAPS, MOVDQA, MOVDQU, etc.
            "COND_JUMP_EXT",  # Other conditional jumps (JG, JL, JGE, etc.)
            "STRING_OP",  # MOVS, STOS, LODS, SCAS, CMPS
            "STACK_ADV",  # ENTER, LEAVE, PUSHA, POPA
            "ARITHMETIC_ADV",  # IMUL, IDIV, ADC, SBB
            "BIT_OP",  # SHL, SHR, SAR, ROL, ROR, etc.
            "FPU_OP",  # FLD, FST, FADD, etc.
            "SYSTEM_OP",  # SYSCALL, INT, SYSENTER
            "CRYPTO_OP",  # AES*, SHA* instructions
            "MISC_OP",  # Rare but interesting (CPUID, RDTSC, etc.)
        ]

        # Create index map like Ghidra
        for i, opcode in enumerate(COMMON_OPCODES):
            opcode_index[opcode] = i

        # Now categorize opcodes using if/elif/else structure like in Ghidra
        for opcode in COMMON_OPCODES:
            # String Operations (checking these first to avoid MOV confusion)
            if opcode.startswith("MOVS") or opcode in [
                "STOS",
                "LODS",
                "SCAS",
                "CMPS",
                "REP",
                "REPE",
                "REPNE",
            ]:
                opcode_categories[opcode] = "STRING_MANIPULATION"

            # Data Movement (after string ops to avoid MOVS confusion)
            elif opcode.startswith("MOV") or opcode in ["LEA", "XCHG"]:
                opcode_categories[opcode] = "DATA_MOVEMENT"

            # Stack Operations
            elif opcode in ["PUSH", "POP", "ENTER", "LEAVE", "PUSHA", "POPA"]:
                opcode_categories[opcode] = "STACK_MANAGEMENT"

            # Control Flow (non-conditional)
            elif opcode in ["JMP", "CALL", "RET"]:
                opcode_categories[opcode] = "CONTROL_FLOW"

            # Conditional Jumps and Loops
            elif opcode.startswith("J") or opcode.startswith("LOOP"):
                opcode_categories[opcode] = "CONDITIONAL_JUMP"

            # Arithmetic
            elif opcode in [
                "ADD",
                "SUB",
                "MUL",
                "DIV",
                "IMUL",
                "IDIV",
                "ADC",
                "SBB",
                "INC",
                "DEC",
                "NEG",
            ]:
                opcode_categories[opcode] = "ARITHMETIC"

            # Logical
            elif opcode in ["AND", "OR", "XOR", "NOT", "TEST", "CMP"]:
                opcode_categories[opcode] = "LOGICAL"

            # Shifts & Rotates
            elif opcode in ["SHL", "SHR", "SAR", "SAL", "ROL", "ROR", "RCL", "RCR"]:
                opcode_categories[opcode] = "SHIFT_ROTATE"

            # System & Interrupts
            elif opcode in [
                "SYSCALL",
                "INT",
                "SYSENTER",
                "SYSEXIT",
                "SGDT",
                "SIDT",
                "SLDT",
                "WRMSR",
                "RDMSR",
            ]:
                opcode_categories[opcode] = "SYSTEM_CALLS"

            # Floating Point
            elif opcode.startswith("F"):
                opcode_categories[opcode] = "FPU_ARITHMETIC"

            # System Information and Random Number Generation
            elif opcode in ["PUSHF", "POPF", "CPUID", "RDTSC", "RDRAND", "RDSEED"]:
                opcode_categories[opcode] = "CPU_FEATURES"

            # Cryptography
            elif opcode.startswith("AES") or opcode.startswith("SHA"):
                opcode_categories[opcode] = "CRYPTOGRAPHIC"

            # Miscellaneous (including flag operations)
            else:
                opcode_categories[opcode] = "MISC"

        # Additional categorization for opcodes not in COMMON_OPCODES
        # This can be used in the normalize_opcode method

        # Store both maps as instance variables
        # self.opcode_categories = opcode_categories
        self.opcode_index = opcode_index

        return opcode_categories

    def is_simd_register(self, register):
        return register in self.sse_xmm