Xiang Zhang

25 papers A* 4A 1B 4Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2019 J jnl
IEEE/ACM Trans. Netw.
Ruozhou Yu, Guoliang Xue, Xiang Zhang
2018 A* conf
INFOCOM
Ruozhou Yu, Guoliang Xue, Xiang Zhang
2018 conf
CNS
Ruozhou Yu, Guoliang Xue, Vishnu Teja Kilari, Xiang Zhang
2018 J jnl
IEEE Commun. Mag.
Ruozhou Yu, Guoliang Xue, Vishnu Teja Kilari, Xiang Zhang
2018 conf
ICC
Xiang Zhang, Dejun Yang, Guoliang Xue, Ruozhou Yu, Jian Tang
2017 conf
EDGE
Yaozhong Song, Stephen S. Yau, Ruozhou Yu, Xiang Zhang, Guoliang Xue
2017 J jnl
IEEE J. Sel. Areas Commun.
Xiang Zhang, Guoliang Xue, Ruozhou Yu, Dejun Yang, Jian Tang
2017 J jnl
IEEE Trans. Veh. Technol.
Dejun Yang, Guoliang Xue, Xiang Zhang
2017 J jnl
IEEE J. Sel. Areas Commun.
Ruozhou Yu, Guoliang Xue, Xiang Zhang
2017 A conf
ICDCS
Xiang Zhang, Guoliang Xue, Ruozhou Yu, Dejun Yang, Jian Tang
2017 A* conf
INFOCOM
Ruozhou Yu, Guoliang Xue, Xiang Zhang, Dan Li
2017 J jnl
IEEE/ACM Trans. Netw.
Ruozhou Yu, Guoliang Xue, Xiang Zhang
2016 J jnl
IEEE Trans. Computers
Kun He, Jing Chen, Ruiying Du, Qianhong Wu, Guoliang Xue, Xiang Zhang
2016 B conf
GLOBECOM
Ruozhou Yu, Guoliang Xue, Xiang Zhang, Jian Tang
2016 J jnl
CoRR
Ruozhou Yu, Guoliang Xue, Xiang Zhang, Dan Li
2015 B conf
GLOBECOM
Xiang Zhang, Guoliang Xue, Dejun Yang, Ruozhou Yu
2015 J jnl
IEEE Internet Things J.
Xiang Zhang, Guoliang Xue, Ruozhou Yu, Dejun Yang, Jian Tang
2015 J jnl
IEEE Netw.
Ruozhou Yu, Guoliang Xue, Vishnu Teja Kilari, Xiang Zhang
2015 conf
ICC
Xiang Zhang, Guoliang Xue, Dejun Yang, Ruozhou Yu, Xiaoyan Huang
2015 B conf
GLOBECOM
Ruozhou Yu, Guoliang Xue, Xiang Zhang
2015 A* conf
INFOCOM
Xiang Zhang, Guoliang Xue, Ruozhou Yu, Dejun Yang, Jian Tang
2014 conf
ICC
Xiang Zhang, Dejun Yang, Guoliang Xue
2014 A* conf
INFOCOM
Dejun Yang, Xiang Zhang, Guoliang Xue
2014 conf
ICC
Dejun Yang, Guoliang Xue, Xiang Zhang
2014 B conf
GLOBECOM
Xiang Zhang, Guoliang Xue, Ruozhou Yu, Dejun Yang, Jian Tang
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False