Xavier Vera

54 papers A* 11A 7B 2C 10Journal 15Unranked 9
YearRankTypeTitle / Venue / Authors
2020 — conf
Inside Tiger Lake: Intel's Next Generation Mobile Client CPU.
Hot Chips Symposium
Xavier Vera
2016 J jnl
A Case for Acoustic Wave Detectors for Soft-Errors.
IEEE Trans. Computers
Gaurang Upasani, Xavier Vera, Antonio González
2014 A* conf
Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery.
ISCA
Gaurang Upasani, Xavier Vera, Antonio González
2014 C conf
Framework for economical error recovery in embedded cores.
IOLTS
Gaurang Upasani, Xavier Vera, Antonio González
2013 A conf
Capturing vulnerability variations for register files.
DATE
Javier Carretero, Enric Herrero, Matteo Monchiero, Tanausú Ramírez, Xavier Vera
2013 A* conf
Deconfigurable microprocessor architectures for silicon debug acceleration.
ISCA
Nikos Foutris, Dimitris Gizopoulos, Xavier Vera, Antonio González
2013 C conf
Reducing DUE-FIT of caches by exploiting acoustic wave detectors for error recovery.
IOLTS
Gaurang Upasani, Xavier Vera, Antonio González
2012 A* conf
Setting an error detection infrastructure with low cost acoustic wave detectors.
ISCA
Gaurang Upasani, Xavier Vera, Antonio González
2011 A* conf
Accelerating microprocessor silicon validation by exposing ISA diversity.
MICRO
Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Xavier Vera, Antonio González
2011 A conf
Architectures for online error detection and recovery in multicore processors.
DATE
Dimitris Gizopoulos, Mihalis Psarakis, Sarita V. Adve, Pradeep Ramachandran, Siva Kumar Sastry Hari, Daniel J. Sorin, Albert Meixner, Arijit Biswas, Xavier Vera
2011 — conf
Control-Flow Recovery Validation Using Microarchitectural Invariants.
DFT
Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro
2011 — conf
Design of complex circuits using the Via-Configurable transistor array regular layout fabric.
SoCC
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
2011 A* conf
Hardware/software-based diagnosis of load-store queues using expandable activity logs.
HPCA
Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González
2011 J jnl
Implementing End-to-End Register Data-Flow Continuous Self-Test.
IEEE Trans. Computers
Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González
2011 C conf
New reliability mechanisms in memory design for sub-22nm technologies.
IOLTS
Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber
2011 — conf
TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies.
FET
Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera
2010 J jnl
Electromigration for microarchitects.
ACM Comput. Surv.
Jaume Abella, Xavier Vera
2010 A* conf
High-Performance low-vcc in-order core.
HPCA
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
2010 A conf
MT-SBST: Self-test optimization in multithreaded multicore architectures.
ITC
Nikos Foutris, Mihalis Psarakis, Dimitris Gizopoulos, Andreas Apostolakis, Xavier Vera, Antonio González
2010 J jnl
Microarchitectural Online Testing for Failure Detection in Memory Order Buffers.
IEEE Trans. Computers
Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella
2010 A conf
The split register file.
DATE
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera
2010 C conf
VCTA: A Via-Configurable Transistor Array regular fabric.
VLSI-SoC
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
2009 C conf
DFx for massively multiprocessors.
IOLTS
Xavier Vera
2009 A* conf
End-to-end register data-flow continuous self-test.
ISCA
Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González
2009 A* conf
Low Vccmin fault-tolerant cache with highly predictable performance.
MICRO
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González
2009 C conf
Online error detection and correction of erratic bits in register files.
IOLTS
Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González
2009 J jnl
Reducing Soft Errors through Operand Width Aware Policies.
IEEE Trans. Dependable Secur. Comput.
Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González
2009 J jnl
Selective replication: A lightweight technique for soft errors.
ACM Trans. Comput. Syst.
Xavier Vera, Jaume Abella, Javier Carretero, Antonio González
2008 C conf
Issue system protection mechanisms.
ICCD
Pedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera
2008 C conf
On-Line Failure Detection and Confinement in Caches.
IOLTS
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
2008 A conf
On-line Failure Detection in Memory Order Buffers.
ITC
Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella
2008 J jnl
Refueling: Preventing Wire Degradation due to Electromigration.
IEEE Micro
Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González, James W. Tschanz
2007 J jnl
Data cache locking for tight timing calculations.
ACM Trans. Embed. Comput. Syst.
Xavier Vera, Björn Lisper, Jingling Xue
2007 C conf
Fuse: A Technique to Anticipate Failures due to Degradation in ALUs.
IOLTS
Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González
2007 A* conf
Penelope: The NBTI-Aware Processor.
MICRO
Jaume Abella, Xavier Vera, Antonio González
2007 C conf
Surviving to Errors in Multi-Core Environments.
IOLTS
Xavier Vera, Jaume Abella
2006 A conf
Empowering a helper cluster through data-width aware instruction selection policies.
IPDPS
Osman S. Unsal, Oguz Ergin, Xavier Vera, Antonio González
2006 J jnl
Exploiting Narrow Values for Soft Error Tolerance.
IEEE Comput. Archit. Lett.
Oguz Ergin, Osman S. Unsal, Xavier Vera, Antonio González
2006 J jnl
Impact of Parameter Variations on Circuits and Microarchitecture.
IEEE Micro
Osman S. Unsal, James W. Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin
2005 J jnl
An accurate cost model for guiding data locality transformations.
ACM Trans. Program. Lang. Syst.
Xavier Vera, Jaume Abella, Josep Llosa, Antonio González
2005 J jnl
IATAC: a smart predictor to turn-off L2 cache lines.
ACM Trans. Archit. Code Optim.
Jaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle
2005 — conf
Variable-Based Multi-module Data Caches for Clustered VLIW Processors.
IEEE PACT
Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González
2004 J jnl
A fast and accurate framework to analyze and optimize cache memory behavior.
ACM Trans. Program. Lang. Syst.
Xavier Vera, Nerina Bermudo, Josep Llosa, Antonio González
2004 J jnl
Efficient and Accurate Analytical Modeling of Whole-Program Data Cache Behavior.
IEEE Trans. Computers
Jingling Xue, Xavier Vera
2003 B conf
Code Tiling for Improving the Cache Performance of PDE Solvers.
ICPP
Qingguang Huang, Jingling Xue, Xavier Vera
2003 A conf
Data Caches in Multitasking Hard Real-Time Systems.
RTSS
Xavier Vera, Björn Lisper, Jingling Xue
2003 A* conf
Data cache locking for higher program predictability.
SIGMETRICS
Xavier Vera, Björn Lisper, Jingling Xue
2003 — conf
Optimizing Program Locality Through CMEs and GAs.
IEEE PACT
Xavier Vera, Jaume Abella, Antonio González, Josep Llosa
2002 A* conf
Let's Study Whole-Program Cache Behaviour Analytically.
HPCA
Xavier Vera, Jingling Xue
2002 — conf
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms.
ICPP Workshops
Jaume Abella, Antonio González, Josep Llosa, Xavier Vera
2002 — conf
Near-Optimal Padding for Removing Conflict Misses.
LCPC
Xavier Vera, Josep Llosa, Antonio González
2000 — conf
A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note).
Euro-Par
Xavier Vera, Josep Llosa, Antonio González, Nerina Bermudo
2000 B conf
An efficient solver for Cache Miss Equations.
ISPASS
Nerina Bermudo, Xavier Vera, Antonio González, Josep Llosa
2000 J jnl
Optimizing cache miss equations polyhedra.
SIGARCH Comput. Archit. News
Nerina Bermudo, Xavier Vera, Antonio González, Josep Llosa