Wuudiann Ke

12 papers A 3C 1Misc 2Journal 4Unranked 2
YearRankTypeTitle / Venue / Authors
1996 A conf
Backplane Interconnect Test in a Boundary-Scan Environment.
ITC
Wuudiann Ke
1996 — conf
Hybrid Pin Control Using Boundary-Scan And Its Applications.
Asian Test Symposium
Wuudiann Ke
1995 A conf
A Secure Data Transmission Scheme for 1149.1 Backplane Test Bus.
ITC
Wuudiann Ke, Duy Le, Najmi T. Jarwala
1995 J jnl
Delay-testable implementations of symmetric functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wuudiann Ke, Premachandran R. Menon
1995 J jnl
Multifault and delay-fault testability of multilevel circuits.
J. Electron. Test.
Wuudiann Ke, Premachandran R. Menon
1995 Misc conf
Multifault testability of delay-testable circuits.
VTS
Wuudiann Ke, Premachandran R. Menon
1995 J jnl
Path-delay-fault testable nonscan sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wuudiann Ke, Premachandran R. Menon
1995 J jnl
Synthesis of Delay-Verifiable Combinational Circuits.
IEEE Trans. Computers
Wuudiann Ke, Premachandran R. Menon
1994 C conf
Delay-Verifiability of Combinational Circuits Based on Primitive Faults.
ICCD
Wuudiann Ke, Premachandran R. Menon
1994 Misc conf
Realization of fully path-delay-fault testable non-scan sequential circuits.
VTS
Wuudiann Ke, Premachandran R. Menon
1994 — conf
Synthesis of Delay-Verifiable Two-Level Circuits.
EDAC-ETC-EUROASIC
Wuudiann Ke, Premachandran R. Menon
1988 A conf
A fast fault simulation algorithm for combinational circuits.
ICCAD
Wuudiann Ke, Sharad C. Seth, Bhargab B. Bhattacharya