Wooyoung Jo

41 papers C 8Journal 12Unranked 21
YearRankTypeTitle / Venue / Authors
2026 — conf
31.5 SoulMate: A 9.8mW Mobile Intelligence System-on-Chip with Mixed-Rank Architecture for On-Device LLM Personalization.
ISSCC
Seongyon Hong, Jiwon Choi, Jeonggyu So, Nayeong Lee, Wooyoung Jo, Zhamaliddin Kalzhan, Woojin Chin, Hoi-Jun Yoo
2026 — conf
SMoLPU: 122.1µJ/Token Sparse MoE-Based Speculative Decoding Language Processing Unit with Adaptive-Offload NPU-CIM Core.
ISSCC
Sangwoo Ha, Jingu Lee, Youngjin Moon, Sunjoo Whang, Wooyoung Jo, Gwangtae Park, Sangjin Kim, Soyeon Um, Junha Ryu, Yurim Jo, Hoi-Jun Yoo
2025 — conf
23.7 BROCA: A 52.4-to-559.2mW Mobile Social Agent System-on-Chip with Adaptive Bit-Truncate Unit and Acoustic-Cluster Bit Grouping.
ISSCC
Wooyoung Jo, Seongyon Hong, Jiwon Choi, Beomseok Kwon, Haoyang Sang, Dongseok Im, Sangyeob Kim, Sangjin Kim, Taekwon Lee, Hoi-Jun Yoo
2025 C conf
A 17.1 TOPS/W FP-INT Transformer Inference Accelerator with Sparsity Boosting and Output Importance-Aware Processing.
ISCAS
Jeonggyu So, Seongyon Hong, Jiwon Choi, Wooyoung Jo, Sangjin Kim, Hoi-Jun Yoo, Donghyeon Han
2025 C conf
A 32.65µm
ISCAS
Jingu Lee, Sangwoo Ha, Sunjoo Whang, Soyeon Kim, Sangjin Kim, Soyeon Um, Wooyoung Jo, Hoi-Jun Yoo
2025 — conf
BROCA: A Low-power and Low-latency Conversational Agent RISC-V System-on-Chip for Voice-interactive Mobile Devices.
HCS
Wooyoung Jo, Seongyon Hong, Jiwon Choi, Beomseok Kwon, Haoyang Sang, Dongseok Im, Sangyeob Kim, Sangjin Kim, Chaeyun Jeong, Yujin Moon, Hoi-Jun Yoo
2025 J jnl
C-Transformer: An Energy-Efficient Homogeneous DNN-Transformer/SNN-Transformer Processor for Large Language Models.
IEEE J. Solid State Circuits
Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Jungwan Lee, Hoi-Jun Yoo
2025 J jnl
Dyamond: Compact and Efficient 1T1C DRAM IMC Accelerator With Bit Column Addition for Memory-Intensive AI.
IEEE J. Solid State Circuits
Seongyon Hong, Wooyoung Jo, Sangjin Kim, Sangyeob Kim, Soyeon Um, Kyomin Sohn, Hoi-Jun Yoo
2025 — conf
Generative Unsupervised Anomaly Detection with Coarse-Fine Ensemble for Workload Reduction in 3D Non-contrast Brain CT of Emergency Room.
MICCAI (3)
JongJun Won, Jihwan Kim, Joonseo Oh, Yereen Yoo, Jieun Yum, Joonsang Lee, Joon hyung Park, Wooyoung Jo, Yoojin Nam, Hyunki Lee, Gil-Sun Hong, Namkug Kim
2025 J jnl
MedErr-CT: A Visual Question Answering Benchmark for Identifying and Correcting Errors in CT Reports.
CoRR
Sunggu Kyung, Hyungbin Park, Jinyoung Seo, Jimin Sung, Jihyun Kim, Dongyeong Kim, Wooyoung Jo, Yoojin Nam, Sangah Park, Taehee Kwon, Sang Min Lee, Namkug Kim
2025 J jnl
MedRegion-CT: Region-Focused Multimodal LLM for Comprehensive 3D CT Report Generation.
CoRR
Sunggu Kyung, Jinyoung Seo, Hyunseok Lim, Dongyeong Kim, Hyungbin Park, Jimin Sung, Jihyun Kim, Wooyoung Jo, Yoojin Nam, Namkug Kim
2024 — conf
20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models.
ISSCC
Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Hoi-Jun Yoo
2024 C conf
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision.
ISCAS
Jiwon Choi, Wooyoung Jo, Seongyon Hong, Beomseok Kwon, Wonhoon Park, Hoi-Jun Yoo
2024 J jnl
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision.
CoRR
Jiwon Choi, Wooyoung Jo, Seongyon Hong, Beomseok Kwon, Wonhoon Park, Hoi-Jun Yoo
2024 — conf
A 66.6 FPS High Quality Gaussian Splats Rendering FPGA Processor with Reconfigurable Computation Architecture.
A-SSCC
Hongseok Lee, Gwangtae Park, Wonhoon Park, Wooyoung Jo, Jongjun Park, Hoi-Jun Yoo
2024 J jnl
A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices.
IEEE Trans. Circuits Syst. II Express Briefs
Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
2024 — conf
A Low-Power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-Device AI.
HCS
Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Hoi-Jun Yoo
2024 — conf
Dyamond: A 1T1C DRAM In-memory Computing Accelerator with Compact MAC-SIMD and Adaptive Column Addition Dataflow.
VLSI Technology and Circuits
Seongyon Hong, Wooyoung Jo, Sangjin Kim, Sangyeob Kim, Kyomin Sohn, Hoi-Jun Yoo
2024 J jnl
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell.
IEEE J. Solid State Circuits
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
2024 — conf
NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator.
COOL CHIPS
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Sangyeob Kim, Hoi-Jun Yoo
2024 J jnl
Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation.
IEEE J. Solid State Circuits
Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo
2023 C conf
A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System.
ISCAS
Hankyul Kwon, Gwangtae Park, Junha Ryu, Wooyoung Jo, Hoi-Jun Yoo
2023 C conf
A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC.
ISCAS
Seongyon Hong, Soyeon Um, Sangjin Kim, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo
2023 C conf
A 5.99 TFLOPS/W Heterogeneous CIM-NPU Architecture for an Energy Efficient Floating-Point DNN Acceleration.
ISCAS
Wonhoon Park, Junha Ryu, Sangjin Kim, Soyeon Um, Wooyoung Jo, Sangyoeb Kim, Hoi-Jun Yoo
2023 C conf
A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency.
ISCAS
Seryeong Kim, Soyeon Kim, Soyeon Um, Sangjin Kim, Zhiyong Li, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo
2023 — conf
A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture.
A-SSCC
Jiwon Choi, Sangyeob Kim, Wonhoon Park, Wooyoung Jo, Hoi-Jun Yoo
2023 — conf
An Energy-Efficient Heterogeneous Fourier Transform-Based Transformer Accelerator with Frequency-Wise Dynamic Bit-Precision.
A-SSCC
Jingu Lee, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
2023 — conf
DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching.
ISSCC
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
2023 — conf
NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices.
VLSI Technology and Circuits
Wooyoung Jo, Sangjin Kim, Juhyoung Lee, Donghyeon Han, Sangyeob Kim, Seungyoon Choi, Hoi-Jun Yoo
2023 — conf
Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation.
VLSI Technology and Circuits
Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo
2022 C conf
A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks.
ISCAS
Wooyoung Jo, Sangjin Kim, Juhyeong Lee, Soyeon Um, Zhiyong Li, Hoi-Jun Yoo
2022 J jnl
ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor.
IEEE Micro
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
2022 — conf
Low-power Autonomous Adaptation System with Deep Reinforcement Learning.
AICAS
Juhyoung Lee, Wooyoung Jo, Seong-Wook Park, Hoi-Jun Yoo
2022 J jnl
OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer.
IEEE J. Solid State Circuits
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Ji-Hoon Kim, Donghyeon Han, Hoi-Jun Yoo
2022 J jnl
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Donghyeon Han, Wooyoung Jo, Hoi-Jun Yoo
2021 — conf
A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory.
VLSI Circuits
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Jinsu Lee, Hoi-Jun Yoo
2021 — conf
An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training.
A-SSCC
Wooyoung Jo, Juhyoung Lee, Seunghyun Park, Hoi-Jun Yoo
2021 — conf
An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory.
HCS
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
2021 J jnl
GST: Group-Sparse Training for Accelerating Deep Reinforcement Learning.
CoRR
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
2021 — conf
OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer.
VLSI Circuits
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
2021 — conf
OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data.
HCS
Juhyoung Lee, Sangyeob Kim, Ji-Hoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Hoi-Jun Yoo