Woogeun Rhee - RankMe

142 papers C 23Journal 56Unranked 62

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 0.015-mm IEEE Solid State Circuits Lett. Qibang Sun, Liqun Feng, Woogeun Rhee, Hanjun Jiang
2025	—	`conf`	A 0.5V 0.55mm CICC Liqun Feng, Xuansheng Ji, Qianxian Liao, Longhao Kuang, Yunzhao Nie, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2025	J	`jnl`	A 0.6-V High-Efficiency BLE Transmitter Using a Hybrid PLL With RDAC-Based Common-Mode Ripple Cancellation in 65-nm CMOS. IEEE J. Solid State Circuits Liqun Feng, Qianxian Liao, Longhao Kuang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2025	—	`conf`	A 1.8Gb/s 8GHz PSK-UWB Transceiver with Extended PPM/PWM Modulation and Embedded Carrier Spreading. CICC Luhua Lin, Bowen Wang, Longhao Kuang, Woogeun Rhee, Zhihua Wang
2025	J	`jnl`	A 27.9-mW 802.15.4/4z 1T2R Transceiver With FIR-Embedded Quadrature Hybrid Correlation and AoA Localization. IEEE J. Solid State Circuits Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2025	J	`jnl`	A 7.5-GHz Frequency-Hopping CDMA UWB Transceiver for Secure Multi-Sensor Connectivity. IEEE Trans. Circuits Syst. II Express Briefs Luhua Lin, Bowen Wang, Woogeun Rhee, Zhihua Wang
2025	J	`jnl`	A Polar Phase-Tracking Receiver With Two-Point Injection Technique. IEEE J. Solid State Circuits Xuansheng Ji, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2025	C	`conf`	An Asynchronous RISC-V Processor Utilizing a Chisel-Based Desynchronization Flow. ISCAS Haoyang Huang, Jilin Zhang, Dexuan Huo, Qibang Sun, Woogeun Rhee, Hong Chen
2025	J	`jnl`	An Ultra-Low-Voltage Bias-Current-Free Fractional-N Hybrid PLL With Voltage-Mode Phase Detection and Interpolation. IEEE J. Solid State Circuits Liqun Feng, Xuansheng Ji, Longhao Kuang, Qianxian Liao, Su Han, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2025	C	`conf`	Analysis and Design of Bias-Current-Free Hybrid Phase-Locked Loops with Multi-Phase Time-Interleaved Phase Detector. ISCAS Qibang Sun, Liqun Feng, Woogeun Rhee, Zhihua Wang
2024	—	`conf`	14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS. ISSCC Liqun Feng, Xuansheng Ji, Longhao Kuang, Qianxian Liao, Su Han, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	A 0.14-nJ/b 200-Mb/s 2.7-3.5-GHz Quasi-Balanced FSK Transceiver With PLL-Based Modulation and Sideband Energy Detection. IEEE Trans. Circuits Syst. I Regul. Pap. Bowen Wang, Cong Ding, Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2024	—	`conf`	A 0.6V Fully-Integrated BLE Transmitter in 65nm CMOS Using a Common-Mode-Ripple-Cancelled Hybrid PLL and a Duty-Cycle-Controlled Class-E/F2 PA Achieving 25% System Efficiency at 0dBm. A-SSCC Liqun Feng, Qianxian Liao, Longhao Kuang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2024	—	`conf`	A 3.4 mW ± 0.45 dB-Gain-Variation 6-10GHz Low-Noise Amplifier with Embedded Capacitive Feedback and RC Extension Network for Gb/s UWB Receivers. ICTA Longhao Kuang, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	A 65-nm Sub-10-mW Communication/Ranging Quadrature Uncertain-IF IR-UWB Transceiver With Twin-OOK Modulation. IEEE J. Solid State Circuits Bowen Wang, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter. IEEE J. Solid State Circuits Liqun Feng, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	A Low-Complexity FM-UWB Transmitter With Digital Reuse and Analog Stacking. IEEE J. Solid State Circuits Bo Zhou, Yifan Li, Zuhang Wang, Chen Wang, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	A Wide Tracking Range Heterodyne Phase-Tracking Receiver With 1-bit Phase-Domain Demodulation. IEEE Trans. Circuits Syst. I Regul. Pap. Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2024	J	`jnl`	An IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65-nm CMOS. IEEE J. Solid State Circuits Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2023	J	`jnl`	A 0.061-pJ/b/dB 28-Gb/s Gradient-Based Maximum Eye Tracking CDR With 2-Tap DFE Adaptation in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Sanghee Lee, Byungjun Kang, Woogeun Rhee, Deog-Kyoon Jeong
2023	—	`conf`	A 17.3mW IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65nm CMOS. ESSCIRC Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2023	—	`conf`	A 2.6GHz ΔΣ Fractional-N Bang-Bang PLL with FIR-Embedded Injection-Locking Phase-Domain Low-Pass Filter. CICC Liqun Feng, Woogeun Rhee, Zhihua Wang
2023	—	`conf`	A 405ps/20% Delay Range, 7.4mW/ns BPF-Based Delay Cell with ISI Mitigation for 7.5-8.5GHz IR-UWB Beamforming Receivers. ICTA Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2023	—	`conf`	A Low-Voltage Bias-Current-Free Pseudo-Differential Hybrid PLL Using a Time-Interleaving Flip-Flop Phase Detector. A-SSCC Liqun Feng, Qianxian Liao, Woogeun Rhee, Zhihua Wang
2023	—	`conf`	A Quadrature Uncertain-IF IR-UWB Transceiver with Twin-OOK Modulation. ISSCC Bowen Wang, Woogeun Rhee, Zhihua Wang
2022	—	`conf`	A 0.14nJ/b 200Mb/s Quasi-Balanced FSK Transceiver with Closed-Loop Modulation and Sideband Energy Detection. CICC Bowen Wang, Cong Ding, Yunzhao Nie, Woogeun Rhee, Zhihua Wang
2022	—	`conf`	A 0.7-2.5GHz NB-loT/GNSS/BLE Hybrid PLL with PA Pulling Mitigation and Out-of-Band Phase Noise Reduction. ICTA Jiahao Zhao, Xuansheng Ji, Su Han, Ziwei Wang, Woogeun Rhee, Zhihua Wang
2022	J	`jnl`	A 13-Bit 2-GS/s Time-Interleaved ADC With Improved Correlation-Based Timing Skew Calibration Strategy. IEEE Trans. Circuits Syst. I Regul. Pap. Meng Ni, Xiao Wang, Fule Li, Woogeun Rhee, Zhihua Wang
2022	—	`conf`	A 7.25-7.75GHz 5.9mW UWB Transceiver with -23.8dBm NBI Tolerance and 1.5cm Ranging Accuracy Using Uncertain IF and Pulse-Triggered Envelope/Energy Detection. CICC Bowen Wang, Haixin Song, Woogeun Rhee, Zhihua Wang
2022	J	`jnl`	A Quantization Noise Reduction Method for Delta-Sigma Fractional-N PLLs Using Cascaded Injection-Locked Oscillators. IEEE Trans. Circuits Syst. II Express Briefs Liqun Feng, Woogeun Rhee, Zhihua Wang
2022	C	`conf`	An 8GHz Communication/Ranging IR-UWB Transmitter with Asymmetric Pulse Shaping and Frequency Hopping for Fine Ranging and Enhanced Link Margin. ISCAS Su Han, Bowen Wang, Woogeun Rhee, Zhihua Wang
2022	—	`conf`	An Analog-Assisted Digital LDO with 0.37mV Output Ripple and 5500x Load Current Range in 180nm CMOS. ICTA Luhua Lin, Bowen Wang, Woogeun Rhee, Zhihua Wang
2022	J	`jnl`	Guest Editorial Introduction to the Special Section on the 2021 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits Jung-Hwan Choi, Po-Chiun Huang, Shouyi Yin, Woogeun Rhee
2021	—	`conf`	A 0.0048mm ICTA Zixiang Wan, Xinyu Xu, Woogeun Rhee, Zhihua Wang
2021	J	`jnl`	A 2.4-GHz Crystal-Less GFSK Receiver Using an Auxiliary Multiphase BBPLL for Digital Output Demodulation With Enhanced Frequency Scaling. IEEE Trans. Circuits Syst. II Express Briefs Jiahao Zhao, Yining Zhang, Kunnong Zeng, Woogeun Rhee, Zhihua Wang
2021	J	`jnl`	A Bias-Current-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation. IEEE Trans. Circuits Syst. I Regul. Pap. Xinyu Xu, Zixiang Wan, Woogeun Rhee, Zhihua Wang
2021	C	`conf`	Design and Analysis of DTC-Free ΔΣ Bang-Bang Phase-Locked Loops. ISCAS Zixiang Wan, Woogeun Rhee, Zhihua Wang
2020	—	`conf`	A 13-bit 312.5-MS/s Pipelined SAR ADC with Integrator-type Residue Amplifier and Inter-stage Gain Stabilization Technique. MWSCAS Meng Ni, Xiao Wang, Zhe Zhou, Yang Ding, Fule Li, Woogeun Rhee, Zhihua Wang
2020	—	`conf`	A 5.4GHz ΔΣ Bang-Bang PLL with 19dB In-Band Noise Reduction by Using a Nested PLL Filter. VLSI-DAT Xiaohua Huang, Bowen Wang, Woogeun Rhee, Zhihua Wang
2020	—	`conf`	A 6-8GHz Multichannel Reconfigurable Pulse-Based Transceiver with 3.5ns Processing Latency and 1cm Ranging Accuracy for Secure Wireless Connectivity. CICC Haixin Song, Woogeun Rhee, Zhihua Wang
2020	J	`jnl`	A 6.5-8.1-GHz Communication/Ranging VWB Transceiver for Secure Wireless Connectivity With Enhanced Bandwidth Efficiency and ΔΣ Energy Detection. IEEE J. Solid State Circuits Haixin Song, Dang Liu, Yining Zhang, Woogeun Rhee, Zhihua Wang
2020	—	`conf`	A Correlation-based Timing Skew Calibration Strategy Using a Time-Interleaved Reference ADC. MWSCAS Meng Ni, Xiao Wang, Zhe Zhou, Yang Ding, Fule Li, Woogeun Rhee, Zhihua Wang
2020	C	`conf`	A Low-Spur Current-Biasing-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation. ISCAS Xinyu Xu, Woogeun Rhee, Zhihua Wang
2020	—	`conf`	A Nonlinearity-Calibration-Free Reconfigurable ADPLL for General Purpose Frequency Modulation. ICTA Zixiang Wan, Woogeun Rhee, Zhihua Wang
2020	J	`jnl`	Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators. IEEE J. Solid State Circuits Xuqiang Zheng, Fangxu Lv, Lei Zhou, DanYu Wu, Jin Wu, Chun Zhang, Woogeun Rhee, Xinyu Liu
2019	—	`conf`	A 100Mb/s 3.5GHz Fully-Balanced BFOOK Modulator Based on Integer-N Hyrbrid PLL. A-SSCC Cong Ding, Haixin Song, Woogeun Rhee, Zhihua Wang
2019	J	`jnl`	A 3.7-mW 2.4-GHz Phase-Tracking GFSK Receiver With BBPLL-Based Demodulation. IEEE J. Solid State Circuits Yining Zhang, Meng Ni, Xiaohua Huang, Woogeun Rhee, Zhihua Wang
2019	—	`conf`	A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL. CICC Xiaohua Huang, Kunnong Zeng, Yuguang Liu, Woogeun Rhee, Taeik Kim, Zhihua Wang
2019	—	`conf`	A 9mW 6-9GHz 2.5Gb/s Proximity Transmitter with Combined OOK/BPSK Modulation for Low Power Mobile Connectivity. VLSI-DAT Yuguang Liu, Haixin Song, Kunnong Zeng, Woogeun Rhee, Zhihua Wang
2019	J	`jnl`	A Capacitor-Less Ripple-Less Hybrid LDO With Exponential Ratio Array and 4000x Load Current Range. IEEE Trans. Circuits Syst. II Express Briefs Yining Zhang, Haixin Song, Ranran Zhou, Woogeun Rhee, Inbo Shim, Zhihua Wang
2019	C	`conf`	A Gaussian-Filtered Fully-Balanced FSK Modulator with Integer-N PLL Based 1 ISCAS Cong Ding, Woogeun Rhee, Zhihua Wang
2019	C	`conf`	A Noise and Spur Reduction Technique for ΔΣ Fractional-N Bang-Bang PLLs with Embedded Phase Domain Filtering. ISCAS Xiaohua Huang, Kunnong Zeng, Woogeun Rhee, Zhihua Wang
2019	—	`conf`	Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced FSK Modulation. VLSI-DAT Yining Zhang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang
2018	J	`jnl`	400-MHz/2.4-GHz Combo WPAN Transceiver IC for Simultaneous Dual-Band Communication With One Single Antenna. IEEE Trans. Circuits Syst. I Regul. Pap. Zhaoyang Weng, Hanjun Jiang, Jingjing Dong, Yang Li, Jingyi Zheng, Yiyu Shen, Fule Li, Woogeun Rhee, Zhihua Wang
2018	J	`jnl`	A 1-GHz 1.6-mW Auto-Calibrated Bit Slicer for Energy/Envelope Detection Receivers. IEEE Trans. Circuits Syst. II Express Briefs Xiaohua Huang, Dang Liu, Woogeun Rhee, Zhihua Wang
2018	J	`jnl`	A 120 pJ/bit ΔΣ-Based 2.4-GHz Transmitter Using FIR-Embedded Digital Power Amplifier. IEEE Trans. Circuits Syst. II Express Briefs Yanshu Guo, Hanjun Jiang, Heng Liu, Zhaoyang Weng, Woogeun Rhee, Chun Zhang, Zhihua Wang
2018	—	`conf`	A 26.6mW 1Gb/s dual-antenna wideband receiver with auto beam steering for secure proximity communications. CICC Dang Liu, Xiaohua Huang, Zhendong Ding, Haixin Song, Woogeun Rhee, Zhihua Wang
2018	J	`jnl`	A 5-mW 750-kb/s Noninvasive Transceiver for Around-the-Head Audio Applications. IEEE Trans. Circuits Syst. II Express Briefs Fei Chen, Woogeun Rhee, Zhihua Wang
2018	—	`conf`	A 6-8GHZ 200MHz Bandwidth 9-Channel VWB Transceiver with 8 Frequency-Hopping Subbands. A-SSCC Haixin Song, Dang Liu, Woogeun Rhee, Zhihua Wang
2018	J	`jnl`	A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector. IEEE J. Solid State Circuits Jianfu Lin, Zheng Song, Nan Qi, Woogeun Rhee, Zhihua Wang, Baoyong Chi
2018	—	`conf`	A ΔΣ DPLL with 1b TDC, 4b DTC and 8-tap FIR filter for low-voltage clock generation/modulation systems. VLSI-DAT Xiaohua Huang, Han Liu, Woogeun Rhee, Zhihua Wang
2017	J	`jnl`	A 0.42-mW 1-Mb/s 3- to 4-GHz Transceiver in 0.18-µm CMOS With Flexible Efficiency, Bandwidth, and Distance Control for IoT Applications. IEEE J. Solid State Circuits Dang Liu, Xuwen Ni, Ranran Zhou, Woogeun Rhee, Zhihua Wang
2017	C	`conf`	A 0.6V 50-to-145MHz PVT tolerant digital PLL with DCO-dedicated ΔΣ LDO and temperature compensation circuits in 65nm CMOS. ISCAS Yudong Zhang, Xiaofeng Liu, Woogeun Rhee, Hanjun Jiang, Zhihua Wang
2017	J	`jnl`	A 1.9-mW 750-kb/s 2.4-GHz F-OOK Transmitter With Symmetric FM Template and High-Point Modulation PLL. IEEE J. Solid State Circuits Yining Zhang, Ranran Zhou, Woogeun Rhee, Zhihua Wang
2017	J	`jnl`	A 17 mW 3-to-5 GHz Duty-Cycled Vital Sign Detection Radar Transceiver With Frequency Hopping and Time-Domain Oversampling. IEEE Trans. Circuits Syst. I Regul. Pap. Xican Chen, Yiyu Shen, Zhicheng Wang, Woogeun Rhee, Zhihua Wang
2017	—	`conf`	A 6.1mW 5Mb/s 2.4GHz transceiver with F-OOK modulation for high bandwidth and energy efficiencies. CICC Yining Zhang, Ranran Zhou, Woogeun Rhee, Zhihua Wang
2017	—	`conf`	A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector. A-SSCC Jianfu Lin, Zheng Song, Nan Qi, Woogeun Rhee, Baoyong Chi
2017	C	`conf`	An energy/bandwidth/area efficient frequency-domain OOK transmitter with phase rotated modulation. ISCAS Ranran Zhou, Yining Zhang, Woogeun Rhee, Zhihua Wang
2017	—	`conf`	Session 15 - Energy-efficient wireless for 5G and IoT. CICC Woogeun Rhee, Swaminathan Sankaran
2016	—	`conf`	A 1.9mW 750kb/s 2.4GHz F-OOK transmitter with symmetric FM template and high-point modulation PLL. A-SSCC Yining Zhang, Ranran Zhou, Woogeun Rhee, Zhihua Wang
2016	—	`conf`	An overview of digital-intensive ΔΣ phase-locked loops utilizing 1-bit conversion and modulation. MWSCAS Woogeun Rhee, Sitao Lv, Han Liu, Ni Xu, Zhihua Wang
2016	—	`conf`	EE4: Eureka! The best moments of solid-state circuit design in the 2000s. ISSCC Woogeun Rhee, Eric A. M. Klumperink, Hossein Hashemi
2015	J	`jnl`	A 0.35-0.5-V 18-152 MHz Digitally Controlled Relaxation Oscillator With Adaptive Threshold Calibration in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Yudong Zhang, Woogeun Rhee, Taeik Kim, Hojin Park, Zhihua Wang
2015	J	`jnl`	A 13.3 mW 500 Mb/s IR-UWB Transceiver With Link Margin Enhancement Technique for Meter-Range Communications. IEEE J. Solid State Circuits Shuli Geng, Dang Liu, Yanfeng Li, Huiying Zhuo, Woogeun Rhee, Zhihua Wang
2015	—	`conf`	A 2.4 GHz two-point Δ-Σ modulator with gain calibration and AFC for WPAN/BAN applications. ASICON Chao Yang, Shaoquan Gao, Jingjing Dong, Hanjun Jiang, Woogeun Rhee, Zhihua Wang
2015	—	`conf`	A 7.6mW 2Gb/s proximity transmitter for smartphone-mirrored display applications. A-SSCC Dang Liu, Xiaofeng Liu, Woogeun Rhee, Zhihua Wang
2015	—	`conf`	A delta-sigma-based transmitter utilizing FIR-embedded digital power amplifiers. MWSCAS Heng Liu, Hanjun Jiang, Yiyu Shen, Woogeun Rhee, Zhihua Wang
2015	C	`conf`	A digital power amplifier with FIR-embedded 1-Bit high-order ΔΣ modulation for WBAN polar transmitters. ISCAS Yiyu Shen, Woogeun Rhee, Zhihua Wang
2015	—	`conf`	A high-PSRR ADPLL with self-regulated GRO TDC and DCO-dedicated voltage regulator. VLSI-DAT Yanfeng Li, Yutao Liu, Woogeun Rhee, Zhihua Wang
2015	C	`conf`	A multi-bit FIR filtering technique for two-point modulators with dedicated digital high-pass modulation path. ISCAS Xiaoyong Li, Woogeun Rhee, Wen Jia, Zhihua Wang
2015	—	`conf`	A spread-spectrum clock generator with FIR-embedded binary phase detection and 1-bit high-order ΔΣ modulation. A-SSCC Ni Xu, Yiyu Shen, Sitao Lv, Woogeun Rhee, Zhihua Wang
2015	—	`conf`	Phase-locked frequency synthesis and modulation for modern wireless transceivers. CICC Woogeun Rhee
2014	—	`conf`	9.2 A 13.3mW 500Mb/s IR-UWB transceiver with link-margin enhancement technique for meter-range communications. ISSCC Shuli Geng, Dang Liu, Yanfeng Li, Huiying Zhuo, Woogeun Rhee, Zhihua Wang
2014	—	`conf`	9.3 A 1mW 1Mb/s 7.75-to-8.25GHz chirp-UWB transceiver with low peak-power transmission and fast synchronization capability. ISSCC Fei Chen, Yu Li, Dang Liu, Woogeun Rhee, Jongjin Kim, Dong-Wook Kim, Zhihua Wang
2014	—	`conf`	A 0.65V 1.2mW 2.4GHz/400MHz dual-mode phase modulator for mobile healthcare applications. A-SSCC Yang Li, Ni Xu, Yining Zhang, Woogeun Rhee, Sanghoon Kang, Zhihua Wang
2014	—	`conf`	A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS. VLSI-DAT Huiying Zhuo, Yu Li, Woogeun Rhee, Zhihua Wang
2014	C	`conf`	A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLL. ISCAS Yanfeng Li, Ni Xu, Woogeun Rhee, Zhihua Wang
2014	—	`conf`	A 3.5-4GHz FMCW radar transceiver design with phase-domain oversampled ranging by utilizing a 1-bit ΔΣ TDC. VLSI-DAT Wei Zhang, Yizhi Han, Fei Chen, Bo Zhou, Xican Chen, Woogeun Rhee, Zhihua Wang
2014	J	`jnl`	A 4.8-mW/Gb/s 9.6-Gb/s 5 + 1-Lane Source-Synchronous Transmitter in 65-nm Bulk CMOS. IEEE Trans. Circuits Syst. II Express Briefs Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Ni Xu, Woogeun Rhee, Liji Wu, Chun Zhang
2014	J	`jnl`	A Hybrid Loop Two-Point Modulator Without DCO Nonlinearity Calibration by Utilizing 1 Bit High-Pass Modulation. IEEE J. Solid State Circuits Ni Xu, Woogeun Rhee, Zhihua Wang
2014	J	`jnl`	A PSRR Enhancing Method for GRO TDC Based Clock Generation Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Yutao Liu, Yizhi Han, Woogeun Rhee, Tae-Young Oh, Zhihua Wang
2014	C	`conf`	A high efficiency robust IR-UWB receiver design for high data rate CM-range communications. ISCAS Dang Liu, Shuli Geng, Woogeun Rhee, Zhihua Wang
2014	J	`jnl`	A ΔΣ-TDC-Based Beamforming Method for Vital Sign Detection Radar Systems. IEEE Trans. Circuits Syst. II Express Briefs Xican Chen, Wei Zhang, Woogeun Rhee, Zhihua Wang
2014	C	`conf`	Algorithm-Based Countermeasures against Power Analysis Attacks for Public-Key Cryptography SM2. CIS Xiaowei Han, Beibei Wang, An Wang, Liji Wu, Woogeun Rhee
2014	—	`conf`	F5: Low-power radios for sensor networks. ISSCC Woogeun Rhee, Gangadhar Burra, Kazutami Arimoto, Pieter Harpe, Brian Otis, David Ruffieux
2013	—	`conf`	A 1.14mW 750kb/s FM-UWB transmitter with 8-FSK subcarrier modulation. CICC Fei Chen, Yu Li, Deyuan Lin, Huiying Zhuo, Woogeun Rhee, Jongjin Kim, Dongwook Kim, Zhihua Wang
2013	—	`conf`	A 5.2-11.8MHz octa-phase relaxation oscillator for 8-PSK FM-UWB transceiver systems. VLSI-DAT Hang Lv, Bo Zhou, Dang Liu, Woogeun Rhee, Yongming Li, Zhihua Wang
2013	C	`conf`	A PLL/DLL based CDR with ΔΣ frequency tracking and low algorithmic jitter generation. ISCAS Shuli Geng, Ni Xu, Jun Li, Xueyi Yu, Woogeun Rhee, Zhihua Wang
2013	J	`jnl`	A Phase-Domain ΔΣ Ranging Method for FMCW Radar Receivers. IEEE Trans. Circuits Syst. II Express Briefs Wei Zhang, Xican Chen, Fei Chen, Woogeun Rhee, Zhihua Wang
2013	—	`conf`	An FM-UWB transceiver with M-PSK subcarrier modulation and regenerative FM demodulation. MWSCAS Dang Liu, Fei Chen, Woogeun Rhee, Zhihua Wang
2013	J	`jnl`	Introduction to the Special Section on the 2012 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits Chang-Hyun Kim, Hong June Park, Woogeun Rhee
2013	J	`jnl`	Reconfigurable FM-UWB transmitter design for robust short range communications. Telecommun. Syst. Bo Zhou, Woogeun Rhee, Dongwook Kim, Zhihua Wang
2012	C	`conf`	A 9.6Gb/s 5+1-lane source synchronous transmitter in 65nm CMOS technology. ISCAS Ke Huang, Chen Jia, Xuqiang Zheng, Ni Xu, Chun Zhang, Woogeun Rhee, Zhihua Wang
2012	J	`jnl`	A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. Nan Qi, Yang Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Ni Xu, Patrick Chiang, Woogeun Rhee, Zhihua Wang
2012	J	`jnl`	A Gated FM-UWB System With Data-Driven Front-End Power Control. IEEE Trans. Circuits Syst. I Regul. Pap. Bo Zhou, Jian Qiao, Rui He, Jinghui Liu, Wei Zhang, Hang Lv, Woogeun Rhee, Yongming Li, Zhihua Wang
2012	—	`conf`	A PVT-insensitive self-dithered TDC design by utilizing a ΔΣ DLL. MWSCAS Yizhi Han, Woogeun Rhee, Zhihua Wang
2012	C	`conf`	A pulse-shaped power amplifier with dynamic bias switching for IR-UWB transmitters. ISCAS Shuli Geng, Woogeun Rhee, Zhihua Wang
2012	C	`conf`	A ΔΣ IR-UWB radar with sub-mm ranging capability for human body monitoring systems. ISCAS Wei Zhang, Woogeun Rhee, Zhihua Wang
2012	J	`jnl`	Clock/Frequency Generation Circuits and Systems. J. Electr. Comput. Eng. Woogeun Rhee, Antonio Liscidini, Jae-Yoon Sim, Kenichi Okada, Sudhakar Pamarti
2012	J	`jnl`	Introduction to the Special Section on the 2011 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits Shen-Iuan Liu, Tsung-Hsien Lin, Woogeun Rhee
2012	—	`conf`	Session 26 overview: Short-range wireless transceivers: Wireless subcommittee. ISSCC Ranjit Gharpurey, Woogeun Rhee
2011	J	`jnl`	A Continuously Tunable Hybrid LC-VCO PLL With Mixed-Mode Dual-Path Control and Bi-level Delta-Sigma Modulated Coarse Tuning. IEEE Trans. Circuits Syst. I Regul. Pap. Yuanfeng Sun, Jian Qiao, Xueyi Yu, Woogeun Rhee, Byeong-Ha Park, Zhihua Wang
2011	C	`conf`	A relaxation oscillator with multi-phase triangular waveform generation. ISCAS Hang Lv, Bo Zhou, Woogeun Rhee, Yongming Li, Zhihua Wang
2011	C	`conf`	A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aid. ISCAS Zhuo Zhang, Woogeun Rhee, Zhihua Wang
2011	J	`jnl`	Semidigital PLL Design for Low-Cost Low-Power Clock Generation. J. Electr. Comput. Eng. Ni Xu, Woogeun Rhee, Zhihua Wang
2010	—	`conf`	Low power, non invasive UWB systems for WBAN and biomedical applications. ICTC Woogeun Rhee, Ni Xu, Bo Zhou, Zhihua Wang
2010	—	`conf`	Power and jitter optimized VCO design using an on-chip supply noise monitoring circuit. APCCAS Yutao Liu, Ni Xu, Woogeun Rhee, Ziqiang Wang, Zhihua Wang
2010	—	`conf`	Reconfigurable, fast AFC technique using code estimation and binary search algorithm for 0.2-6GHz software-defined radio frequency synthesis. APCCAS Jun Li, Ni Xu, Yuanfeng Sun, Woogeun Rhee, Zhihua Wang
2009	—	`conf`	A 0.4-to-1.6GHz low-OSR ΔΣ DLL with self-referenced multiphase generation. ISSCC Xueyi Yu, Woogeun Rhee, Zhihua Wang, Jung-Bae Lee, Changhyun Kim
2009	J	`jnl`	A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops. IEEE J. Solid State Circuits Li Zhang, Xueyi Yu, Yuanfeng Sun, Woogeun Rhee, Dawn Wang, Zhihua Wang, Hongyi Chen
2009	J	`jnl`	A ΔΣ Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications. IEEE J. Solid State Circuits Xueyi Yu, Yuanfeng Sun, Woogeun Rhee, Hyung Ki Ahn, Byeong-Ha Park, Zhihua Wang
2009	J	`jnl`	An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators. IEEE J. Solid State Circuits Xueyi Yu, Yuanfeng Sun, Woogeun Rhee, Zhihua Wang
2009	C	`conf`	Customized Zero Frequency Control for Hybrid FIR Noise Filtering in SigmaDelta Fractional-N PLL. ISCAS Jian Qiao, Xueyi Yu, Woogeun Rhee, Zhihua Wang
2009	C	`conf`	Transient Analysis of Nonlinear Settling Behavior in Charge-pump Phase-locked Loop Design. ISCAS Rui He, Jun Li, Woogeun Rhee, Zhihua Wang
2008	—	`conf`	A 1GHz Fractional-N PLL Clock Generator with Low-OSR ΔΣ Modulation and FIR-Embedded Noise Filtering. ISSCC Xueyi Yu, Yuanfeng Sun, Li Zhang, Woogeun Rhee, Zhihua Wang
2008	—	`conf`	A ΔΣ fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applications. CICC Xueyi Yu, Yuanfeng Sun, Woogeun Rhee, Zhihua Wang, Hyung Ki Ahn, Byeong-Ha Park
2008	J	`jnl`	Experimental Analysis of Substrate Noise Effect on PLL Performance. IEEE Trans. Circuits Syst. II Express Briefs Woogeun Rhee, Keith A. Jenkins, John C. Liobe, Herschel A. Ainspan
2007	C	`conf`	A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider. ISCAS Baoyong Chi, Xueyi Yu, Woogeun Rhee, Zhihua Wang
2007	—	`conf`	All-Digital Dynamic Self-Detection and Self-Compensation of Static Phase Offsets in Charge-Pump PLLs. ISSCC Yong Liu, Woogeun Rhee, Daniel J. Friedman, Donhee Ham
2007	J	`jnl`	An Ultra-Compact Differentially Tuned 6-GHz CMOS LC-VCO With Dynamic Common-Mode Feedback. IEEE J. Solid State Circuits Babak Soltanian, Herschel A. Ainspan, Woogeun Rhee, Daniel J. Friedman, Peter R. Kinget
2006	J	`jnl`	A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. IEEE J. Solid State Circuits John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
2006	—	`conf`	A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS. ISSCC Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
2006	—	`conf`	An Ultra Compact Differentially Tuned 6 GHz CMOS LC VCO with Dynamic Common-Mode Feedback. CICC Baharak Soltanian, Herschel A. Ainspan, Woogeun Rhee, Daniel J. Friedman, Peter R. Kinget
2005	J	`jnl`	A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization. IEEE J. Solid State Circuits Troy J. Beukema, Michael Sorna, Karl Selander, Steven Zier, Brian L. Ji, Phil Murfet, James Mason, Woogeun Rhee, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes
2004	J	`jnl`	A semi-digital delay-locked loop using an analog-based finite state machine. IEEE Trans. Circuits Syst. II Express Briefs Woogeun Rhee, Benjamin D. Parker, Daniel J. Friedman
2003	—	`conf`	A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop. CICC Woogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer
2002	J	`jnl`	A single-chip quad-band (850/900/1800/1900 MHz) direct conversion GSM/GPRS RF transceiver with integrated VCOs and fractional-n synthesizer. IEEE J. Solid State Circuits Rahul Magoon, Alyosha C. Molnar, Jeff Zachan, Geoff Hatcher, Woogeun Rhee
2002	J	`jnl`	An 18-mW 2.5-GHz/900-MHz BiCMOS dual frequency synthesizer with <10-Hz RF carrier resolution. IEEE J. Solid State Circuits Woogeun Rhee, Biagio Bisanti, Akbar Ali
2001	—	`—`	Multi-Bit Delta-Sigma Modulation Technique for Fractional-N Frequency Synthesizers Woogeun Rhee
2000	J	`jnl`	A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order ΔΣ modulator. IEEE J. Solid State Circuits Woogeun Rhee, Bang-Sup Song, Akbar Ali
1999	—	`conf`	An on-chip phase compensation technique in fractional-N frequency synthesis. ISCAS (3) Woogeun Rhee, Akbar Ali
1999	—	`conf`	Design of low-jitter 1-GHz phase-locked loops for digital clock generation. ISCAS (2) Woogeun Rhee