Winser E. Alexander

37 papers A* 1A 1B 1C 3Misc 9Journal 11Unranked 11
YearRankTypeTitle / Venue / Authors
2015 A conf
Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only).
FPGA
Youngsoo Kim, William Harding, Clay S. Gloster Jr., Winser E. Alexander
2013 — conf
Hardware implementation of IIR digital filters for programmable devices.
ICECS
Ramsey Hourani, Hazem Alassaly, Winser E. Alexander
2012 — conf
A Dataflow Framework for DSP Algorithm Refinement.
ISVLSI
Youngsoo Kim, Winser E. Alexander, William W. Edmonson
2011 J jnl
Block Floating Point Interval ALU for Digital Signal Processing.
Reliab. Comput.
Sandeep Hattangady, William W. Edmonson, Winser E. Alexander
2009 J jnl
Automated Design Space Exploration for DSP Applications.
J. Signal Process. Syst.
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
2008 — conf
An Implementation of a Biological Neural Model using Analog-Digital Integrated Circuits.
BMAS
Gary Charles, Christal Gordon, Winser E. Alexander
2007 — conf
The Use of Interval Methods in Signal Processing and Control for Systems Biology.
FOCI
William W. Edmonson, Senanu Ocloo, Cranos Williams, Winser E. Alexander
2006 — conf
Automated Architectural Exploration for Signal Processing Algorithms.
SiPS
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winser E. Alexander
2006 — conf
Free Energy Analysis on the Coding Region of the Individual Genes of Saccharomyces cerevisiae.
EMBC
Chuanhua Xing, Donald L. Bitzer, Winser E. Alexander, Anne-Marie Stomp, Mladen A. Vouk
2006 — conf
Pipelined ALU for Signal Processing to Implement Interval Arithmetic.
SiPS
Ruchir Gupte, William W. Edmonson, Senanu Ocloo, Winser E. Alexander
2004 — conf
Medical image compression using post-segmentation approach.
ICASSP (5)
Sung H. Yoon, Ji H. Lee, Jung H. Kim, Winser E. Alexander
2003 — conf
Dual clock rate block data parallel architecture.
ISCAS (4)
An-Te Deng, Winser E. Alexander
2002 C conf
Region-based scalable coding for video communications.
VCIP
Ji H. Lee, Sung H. Yoon, Winser E. Alexander
2001 C conf
Scalable image coding for interactive image communication over networks.
VCIP
Sung H. Yoon, Ji H. Lee, Winser E. Alexander
2000 J jnl
Parallel image processin gwith the block data paralel architecture.
IBM J. Res. Dev.
Winser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.
1998 J jnl
A mean field annealing approach to robust corner detection.
IEEE Trans. Syst. Man Cybern. Part B
Kwanghoon Sohn, Jung H. Kim, Winser E. Alexander
1998 J jnl
An optimum solution for scale-invariant object recognition based on the multiresolution approximation.
Pattern Recognit.
Sung H. Yoon, Jung H. Kim, Winser E. Alexander, Seong M. Park, Kwang H. Sohn
1996 Misc conf
Matrix Inversion on a Scalable Distributed Memory Parallel Architectur.
PDPTA
Vincent C. Wilburn, Sonetra Howard, Winser E. Alexander
1996 J jnl
Parallel image processing with the block data parallel architecture.
Proc. IEEE
Winser E. Alexander, Douglas S. Reeves, Clay S. Gloster Jr.
1996 Misc conf
Real-Time Implementation of the Kalman Filter Using the Block Data Parallel Architecture.
PDPTA
Sonetra Howard, Winser E. Alexander
1994 J jnl
A Constrained Regularization Approach to Robust Corner Detection.
IEEE Trans. Syst. Man Cybern. Syst.
Kwanghoon Sohn, Winser E. Alexander, Jung H. Kim, Wesley E. Snyder
1994 B conf
A Programmable Simulator for Analyzing the Block Data Flow Architecture.
MASCOTS
Sean Alexandre, Winser E. Alexander, Douglas S. Reeves
1994 — conf
Block Data Processing Using Commercial Processors.
ICPP (1)
Kenneth N. Ellis, Winser E. Alexander
1992 Misc conf
Adaptive state space filtering with FIR convergence behaviour.
ICASSP
William W. Edmonson, Winser E. Alexander, Mohamed F. Chouikha
1992 A* conf
Curvature estimation and unique corner point detection for boundary representation.
ICRA
Kwanghoon Sohn, Winser E. Alexander, Jung H. Kim, Yonghoon Kim, Wesley E. Snyder
1992 J jnl
Fault Diagnosis in Analog Circuits Using Element Modulation.
IEEE Des. Test Comput.
Alvernon Walker, Winser E. Alexander, Parag K. Lala
1992 — conf
Parallel inverse QR decomposition.
ACM Southeast Regional Conference
Hongyu Xu, Winser E. Alexander
1991 Misc conf
Sampling error analysis in perfect reconstruction transmultiplexers.
ICASSP
Hatice Örün Öztürk, Winser E. Alexander
1990 Misc conf
Mean square error analysis for the fast LMS-sine algorithm.
ICASSP
M. A. Khasawneh, Winser E. Alexander
1989 J jnl
Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing.
IEEE Trans. Acoust. Speech Signal Process.
Mohamed-Yahia Dabbagh, Winser E. Alexander
1988 C conf
A novel VLSI architecture for the real-time implementation of 2-D signal processing systems.
ICCD
Seong-Mo Park, Winser E. Alexander, Jung H. Kim, William E. Batchelor, William T. Krakow
1988 Misc conf
Boundary value transient suppression for N-D digital systems.
ICASSP
Winser E. Alexander, William W. Edmonson
1988 Misc conf
Stability analysis of the fast RLS adaptation algorithm.
ICASSP
Daehoon Kim, Winser E. Alexander
1987 J jnl
A Multiprocessor Architecture for Two-Dimensional Digital Filters.
IEEE Trans. Computers
Jung H. Kim, Winser E. Alexander
1987 Misc conf
Derivation and stability analysis of multidimensional IIR block digital filters.
ICASSP
Chwen-Jye Ju, Winser E. Alexander
1984 J jnl
B-HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer system.
SIGARCH Comput. Archit. News
Dharma P. Agrawal, Winser E. Alexander
1984 Misc conf
Initial condition transient suppression for two dimensional recursive digital filters.
ICASSP
Winser E. Alexander