Wim Vanderbauwhede

123 papers A* 2A 10B 16C 3Misc 2Journal 48Unranked 41

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Optimising Stencil Code on FPGAs by Trading Data Movement for Compute using Compiler Rewrite Rules. Int. J. Parallel Program. Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2025	B	`conf`	Compiler Support for Speculation in Decoupled Access/Execute Architectures. CC Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2025	J	`jnl`	Compiler Support for Speculation in Decoupled Access/Execute Architectures. CoRR Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2025	A	`conf`	Dynamic Loop Fusion in High-Level Synthesis. FPGA Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2025	J	`jnl`	Dynamic Loop Fusion in High-Level Synthesis. CoRR Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2025	J	`jnl`	Energy-Aware Workflow Execution: An Overview of Techniques for Saving Energy and Emissions in Scientific Compute Clusters. CoRR Lauritz Thamsen, Yehia Elkhatib, Paul Harvey, Syed Waqar Nabi, Jeremy Singer, Wim Vanderbauwhede
2025	J	`jnl`	Modelling Scenarios for Carbon-aware Geographic Load Shifting of Compute Workloads. CoRR Wim Vanderbauwhede
2024	J	`jnl`	Estimating the Increase in Emissions caused by AI-augmented Search. CoRR Wim Vanderbauwhede
2024	J	`jnl`	Optimising Iteration Scheduling for Full-State Vector Simulation of Quantum Circuits on FPGAs. CoRR Youssef Moawad, Andrew Brown, René Steijl, Wim Vanderbauwhede
2023	—	`conf`	A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis. ICFPT Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2023	J	`jnl`	A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis. CoRR Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2023	B	`conf`	Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis. FPL Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2023	J	`jnl`	Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis. CoRR Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2023	Misc	`conf`	Dynamically Scheduled Memory Operations in Static High-Level Synthesis. FCCM Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2023	J	`jnl`	Frugal Computing - On the need for low-carbon and sustainable computing and the path towards zero-carbon computing. CoRR Wim Vanderbauwhede
2023	J	`jnl`	Quantum Circuit-Width Reduction through Parameterisation and Specialisation. Algorithms Youssef Moawad, Wim Vanderbauwhede, René Steijl
2023	A	`conf`	Wiring Circuits Is Easy as {0, 1, ω}, or Is It... ECOOP Jan de Muijnck-Hughes, Wim Vanderbauwhede
2023	J	`jnl`	Wiring Circuits Is Easy as {0, 1, ω}, or Is It... (Artifact). Dagstuhl Artifacts Ser. Jan de Muijnck-Hughes, Wim Vanderbauwhede
2022	J	`jnl`	Making legacy Fortran code type safe through automated program transformation. J. Supercomput. Wim Vanderbauwhede
2022	B	`conf`	Reducing FPGA Memory Footprint of Stencil Codes through Automatic Extraction of Memory Patterns. FPL Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
2022	J	`jnl`	Transformations for accelerator-based quantum circuit simulation in Haskell. CoRR Youssef Moawad, Wim Vanderbauwhede, René Steijl
2021	J	`jnl`	PERCEPTRON: an open-source GPU-accelerated proteoform identification pipeline for top-down proteomics. Nucleic Acids Res. Muhammad Farhan Khalid, Kanzal Iman, Amna Ghafoor, Mujtaba Saboor, Ahsan Ali, Urwa Muaz, Abdul Rehman Basharat, Taha Tahir, Muhammad Abubakar, Momina Amer Akhter, Syed Waqar Nabi, Wim Vanderbauwhede, Fayyaz Ahmad, Bilal Wajid, Safee Ullah Chaudhary
2020	J	`jnl`	A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Artifact). Dagstuhl Artifacts Ser. Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
2020	A	`conf`	A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Pearl). ECOOP Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
2020	J	`jnl`	FPGAs for Domain Experts. Int. J. Reconfigurable Comput. Wim Vanderbauwhede, Sven-Bodo Scholz, Martin Margala
2019	J	`jnl`	A Typing Discipline for Hardware Interfaces (Artifact). Dagstuhl Artifacts Ser. Jan de Muijnck-Hughes, Wim Vanderbauwhede
2019	A	`conf`	A Typing Discipline for Hardware Interfaces. ECOOP Jan de Muijnck-Hughes, Wim Vanderbauwhede
2019	J	`jnl`	Automatic Pipelining and Vectorization of Scientific Code for FPGAs. Int. J. Reconfigurable Comput. Syed Waqar Nabi, Wim Vanderbauwhede
2019	—	`conf`	Efficient FPGA Cost-Performance Space Exploration using Type-Driven Program Transformations. ReConFig Cristian Urlea, Wim Vanderbauwhede, Syed Waqar Nabi
2019	J	`jnl`	FPGA design space exploration for scientific HPC applications using a fast and accurate cost model based on roofline analysis. J. Parallel Distributed Comput. Syed Waqar Nabi, Wim Vanderbauwhede
2019	—	`conf`	Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAs. IPDPS Workshops Syed Waqar Nabi, Wim Vanderbauwhede
2019	J	`jnl`	Towards Automatic Transformation of Legacy Scientific Code into OpenCL for Optimal Performance on FPGAs. CoRR Wim Vanderbauwhede, Syed Waqar Nabi
2019	J	`jnl`	Type-Driven Automated Program Transformations and Cost Modelling for Optimising Streaming Programs on FPGAs. Int. J. Parallel Program. Wim Vanderbauwhede, Syed Waqar Nabi, Cristian Urlea
2019	—	`conf`	Value-Dependent Session Design in a Dependently Typed Language. PLACES@ETAPS Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
2018	—	`conf`	MP-STREAM: A Memory Performance Benchmark for Design Space Exploration on Heterogeneous HPC Devices. IPDPS Workshops Syed Waqar Nabi, Wim Vanderbauwhede
2018	J	`jnl`	The Glasgow Fortran Source-to-Source Compiler. J. Open Source Softw. Wim Vanderbauwhede
2017	J	`jnl`	2D Image Convolution using Three Parallel Programming Models on the Xeon Phi. CoRR Ashkan Tousimojarad, Wim Vanderbauwhede, W. Paul Cockshott
2017	J	`jnl`	Domain-Specific Acceleration and Auto-Parallelization of Legacy Scientific Code in FORTRAN 77 using Source-to-Source Compilation. CoRR Wim Vanderbauwhede, Gavin Davidson
2016	—	`conf`	A Fast and Accurate Cost Model for FPGA Design Space Exploration in HPC Applications. IPDPS Workshops Syed Waqar Nabi, Wim Vanderbauwhede
2016	J	`jnl`	An analysis of the feasibility and benefits of GPU/multicore acceleration of the Weather Research and Forecasting model. Concurr. Comput. Pract. Exp. Wim Vanderbauwhede, Tetsuya Takemi
2016	—	`conf`	Document classification systems in heterogeneous computing environments. PATMOS Nasibeh Nasiri, Philip Colangelo, Oren Segal, Martin Margala, Wim Vanderbauwhede
2016	C	`conf`	Evaluation of the Memory Communication Traffic in a Hierarchical Cache Model for Massively-Manycore Processors. PDP Sharifa Al Khanjari, Wim Vanderbauwhede
2016	A	`conf`	Improving Resilience by Deploying Permuted Code onto Physically Unclonable Unique Processors. CCC Andreas Assmuth, Paul Cockshott, Jana Kipke, Karen Renaud, Lewis Mackenzie, Wim Vanderbauwhede, Matthias Söllner, Tilo Fischer, George R. S. Weir
2015	J	`jnl`	A Reconfigurable Vector Instruction Processor for Accelerating a Convection Parametrization Model on FPGAs. CoRR Syed Waqar Nabi, Saji N. Hameed, Wim Vanderbauwhede
2015	J	`jnl`	An Intermediate Language and Estimator for Automated Design Space Exploration on FPGAs. CoRR Syed Waqar Nabi, Wim Vanderbauwhede
2015	—	`conf`	Efficient Parallel Linked List Processing. PARCO Ashkan Tousimojarad, Wim Vanderbauwhede
2015	—	`conf`	FPGA Port of a Large Scientific Model from Legacy Code: The Emanuel Convection Scheme. PARCO Kristian Thorin Hentschel, Wim Vanderbauwhede, Syed Waqar Nabi
2015	—	`conf`	FPGAs as Components in Heterogeneous High-Performance Computing Systems: Raising the Abstraction Level. PARCO Wim Vanderbauwhede, Syed Waqar Nabi
2015	A	`conf`	High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only). FPGA Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti
2015	J	`jnl`	Inferring Program Transformations from Type Transformations for Partitioning of Ordered Sets. CoRR Wim Vanderbauwhede
2015	J	`jnl`	Model Coupling between the Weather Research and Forecasting Model and the DPRI Large Eddy Simulator for Urban Flows on GPU-accelerated Multicore Systems. CoRR Wim Vanderbauwhede
2015	C	`conf`	Number of Tasks, not Threads, is Key. PDP Ashkan Tousimojarad, Wim Vanderbauwhede
2015	J	`jnl`	Putting Heterogeneous High-Performance Computing at the Fingertips of Domain Experts (NII Shonan Meeting 2015-18). NII Shonan Meet. Rep. Wim Vanderbauwhede, Sven-Bodo Scholz, Tetsuya Takemi
2015	—	`conf`	Shortest Path Routing Algorithm for Hierarchical Interconnection Network-on-Chip. FNC/MobiSPC Omair Inam, Sharifa Al Khanjari, Wim Vanderbauwhede
2015	J	`jnl`	Steal Locally, Share Globally - A Strategy for Multiprogramming in the Manycore Era. Int. J. Parallel Program. Ashkan Tousimojarad, Wim Vanderbauwhede
2015	—	`conf`	The Impact of Traffic Localisation on the Performance of NoCs for Very Large Manycore Systems. FNC/MobiSPC Sharifa Al Khanjari, Wim Vanderbauwhede
2015	—	`conf`	Twinned buffering: A simple and highly effective scheme for parallelization of Successive Over-Relaxation on GPUs and other accelerators. HPCS Wim Vanderbauwhede, Tetsuya Takemi
2015	—	`conf`	Using type transformations to generate program variants for FPGA design space exploration. ReConFig Syed Waqar Nabi, Wim Vanderbauwhede
2014	C	`conf`	A Parallel Task-Based Approach to Linear Algebra. ISPDC Ashkan Tousimojarad, Wim Vanderbauwhede
2014	J	`jnl`	A Parallel Task-based Approach to Linear Algebra. CoRR Ashkan Tousimojarad, Wim Vanderbauwhede
2014	—	`conf`	Accelerating Lagrangian particle dispersion in the atmosphere with OpenCL across multiple platforms. IWOCL Paul Harvey, Saji Hameed, Wim Vanderbauwhede
2014	J	`jnl`	An Efficient Thread Mapping Strategy for Multiprogramming on Manycore Processors. CoRR Ashkan Tousimojarad, Wim Vanderbauwhede
2014	J	`jnl`	Cache-aware Parallel Programming for Manycore Processors. CoRR Ashkan Tousimojarad, Wim Vanderbauwhede
2014	—	`conf`	Comparison of Three Popular Parallel Programming Models on the Intel Xeon Phi. Euro-Par Workshops (2) Ashkan Tousimojarad, Wim Vanderbauwhede
2014	—	`conf`	High level programming of FPGAs for HPC and data centric applications. HPEC Oren Segal, Nasibeh Nasiri, Martin Margala, Wim Vanderbauwhede
2014	—	`conf`	List-based Monadic Computations for Dynamically Typed Languages. Dyla@PLDI Wim Vanderbauwhede
2013	J	`jnl`	A hybrid CPU-FPGA system for high throughput (10Gb/s) streaming document classification. SIGARCH Comput. Archit. News Wim Vanderbauwhede, Anton Frolov, Sai Rahul Chalamalasetti, Martin Margala
2013	—	`conf`	An Efficient Thread Mapping Strategy for Multiprogramming on Manycore Processors. PARCO Ashkan Tousimojarad, Wim Vanderbauwhede
2013	—	`conf`	An investigation into the feasibility and benefits of GPU/multicore acceleration of the weather research and forecasting model. HPCS Wim Vanderbauwhede, Tetsuya Takemi
2013	J	`jnl`	Design and Evaluation of High-Performance Processing Elements for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede
2013	A	`conf`	High throughput filtering using FPGA-acceleration. CIKM Wim Vanderbauwhede, Anton Frolov, Leif Azzopardi, Sai Rahul Chalamalasetti, Martin Margala
2013	—	`conf`	Implementing data parallelisation in a Nested-Sampling Monte Carlo algorithm. HPCS Wim Vanderbauwhede, Stefanie Lewis, David Ireland
2013	—	`ed.`	Proceedings 6th Workshop on Programming Language Approaches to Concurrency and Communication-cEntric Software, PLACES 2013, Rome, Italy, 23rd March 2013. PLACES Nobuko Yoshida, Wim Vanderbauwhede
2013	—	`conf`	The Glasgow Parallel Reduction Machine: Programming Shared-memory Many-core Systems using Parallel Task Composition. PLACES Ashkan Tousimojarad, Wim Vanderbauwhede
2013	J	`jnl`	Throughput/Resource-Efficient Reconfigurable Processor for Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede
2012	B	`conf`	Evaluating FPGA-acceleration for real-time unstructured search. ISPASS Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede, Mitch Wright, Parthasarathy Ranganathan
2012	J	`jnl`	Impact of Random Dopant Fluctuations on the Timing Characteristics of Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. Faiz-ul Hassan, Wim Vanderbauwhede, Fernando Rodríguez Salazar
2012	—	`conf`	Improving user experience of submitting jobs to HPC resources. HPCS Gordon Stewart, Wim Vanderbauwhede
2012	J	`jnl`	Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application. Int. J. Reconfigurable Comput. Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Martin Margala
2011	—	`conf`	A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks. HPCS Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala
2011	J	`jnl`	An analytical model of broadcast in QoS-aware wormhole-routed NoCs. J. Syst. Softw. Mahmoud Moadeli, Wim Vanderbauwhede
2010	—	`conf`	A C++-embedded Domain-Specific Language for programming the MORA soft processor array. ASAP Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit
2010	—	`conf`	A high-level language for programming a NoC-based Dynamic Reconfiguration Infrastructure. DASIP Wim Vanderbauwhede, Syed Waqar Nabi
2010	—	`conf`	A survey of patent users: an analysis of tasks, behavior, search functionality and system requirements. IIiX Hideo Joho, Leif Azzopardi, Wim Vanderbauwhede
2010	J	`jnl`	An analytical performance model for the Spidergon NoC with virtual channels. J. Syst. Archit. Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Partha P. Maji
2010	J	`jnl`	Communication modeling of multicast in all-port wormhole-routed NoCs. J. Syst. Softw. Mahmoud Moadeli, Wim Vanderbauwhede
2010	J	`jnl`	Performance Analysis of On-Chip Communication Structures under Device Variability. Int. J. Embed. Real Time Commun. Syst. Faiz-ul Hassan, Wim Vanderbauwhede, Fernando Rodríguez Salazar
2010	J	`jnl`	Radiation-Hardened Reconfigurable Array With Instruction Roll-Back. IEEE Embed. Syst. Lett. Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede
2010	A*	`conf`	Search system requirements of patent analysts. SIGIR Leif Azzopardi, Wim Vanderbauwhede, Hideo Joho
2009	B	`conf`	A Communication Model of Broadcast in Wormhole-Routed Networks on-Chip. AINA Mahmoud Moadeli, Wim Vanderbauwhede
2009	B	`conf`	A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model. FPL Sai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala
2009	A	`conf`	A performance model of multicast communication in wormhole-routed networks on-chip. IPDPS Mahmoud Moadeli, Wim Vanderbauwhede
2009	J	`jnl`	An Analytical Comparison of the Spidergon and Rectangular Mesh NoCs. J. Interconnect. Networks Mahmoud Moadeli, Ali Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
2009	Misc	`conf`	Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems. FCCM Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
2009	—	`conf`	Automated instrumentation of FPGA-based systems for system-level transaction monitoring. SoC Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
2009	B	`conf`	Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring. LCTES Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
2009	A	`conf`	Design and implementation of the Quarc Network on-Chip. IPDPS Mahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede
2009	A*	`conf`	Developing energy efficient filtering systems. SIGIR Leif Azzopardi, Wim Vanderbauwhede, Mahmoud Moadeli
2009	—	`conf`	Dynamic counter-based broadcast in MANETs. PM2HW2N@MSWiM Sarah Omar Al-Humoud, Lewis M. Mackenzie, Wim Vanderbauwhede
2009	B	`conf`	FPGA-accelerated Information Retrieval: High-efficiency document filtering. FPL Wim Vanderbauwhede, Leif Azzopardi, Mahmoud Moadeli
2009	—	`conf`	Impact of device variability in the communication structures for future synchronous SoC designs. SoC Faiz-ul Hassan, B. Cheng, Wim Vanderbauwhede, Fernando Rodríguez Salazar
2009	—	`conf`	MAW: A Reliable Lightweight Multi-hop Wireless Sensor Network Routing Protocol. CSE (2) Kunjan Patel, Jong Chern Lim, Chris J. Bleakley, Wim Vanderbauwhede
2009	—	`conf`	MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor. AHS Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede
2009	—	`conf`	Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. ERSA Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit
2009	B	`conf`	Quarc: A High-Efficiency Network on-Chip Architecture. AINA Mahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede
2008	—	`conf`	A Dynamically Reconfigurable Hardware Co-Processor for a Multi-Standard Wireless MAC Processor. AHS Syed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede
2008	—	`conf`	A Formal Semantics for Control and Data flow in the Gannet Service-based System-on-Chip Architecture. ERSA Wim Vanderbauwhede
2008	—	`conf`	A Hardware Relaxation Paradigm for Solving NP-Hard Problems. BCS Int. Acad. Conf. Paul Cockshott, Andreas Koltes, John T. O'Donnell, Patrick Prosser, Wim Vanderbauwhede
2008	B	`conf`	A Performance Model of Communication in the Quarc NoC. ICPADS Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
2008	—	`conf`	A coarse-grained Dynamically Reconfigurable MAC Processor for power-sensitive multi-standard devices. SoCC Syed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede
2008	A	`conf`	A type system for static typing of a domain-specific language. FPGA Paul Edward McKechnie, Nathan A. Lindop, Wim Vanderbauwhede
2008	J	`jnl`	Communication Modeling of QoS-Aware Wormhole-Routed NoCs. J. Interconnect. Networks Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
2008	B	`conf`	Interface and Reconfiguration Controller for a wireless MAC-oriented dynamically reconfigurable hardware co-processor. FPL Syed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede
2008	B	`conf`	Modeling Differentiated Services-Based QoS in Wormhole-Routed NoCs. AINA Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
2008	B	`conf`	Quarc: A Novel Network-On-Chip Architecture. ICPADS Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
2008	—	`conf`	The Gannet Service Manager: A Distributed Dataflow Controller for Heterogeneous Multi-core SoCs. AHS Wim Vanderbauwhede, Paul Edward McKechnie, Chidambaram Thirunavukkarasu
2007	B	`conf`	An Analytical Performance Model for the Spidergon NoC. AINA Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
2007	B	`conf`	Analytical modelling of communication in the rectangular mesh NoC. ICPADS Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede
2007	B	`conf`	Communication Modelling of the Spidergon NoC with Virtual Channels. ICPP Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
2007	—	`conf`	Implementation of Finite State Machines on a Reconfigurable Device. AHS Graema Milligan, Wim Vanderbauwhede
2007	—	`conf`	Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture. AHS Wim Vanderbauwhede
2006	—	`conf`	The Gannet Service-Based SoC: A Service-level Reconfigurable Architecture. AHS Wim Vanderbauwhede
2001	J	`jnl`	A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies. Microelectron. Reliab. Zhenqiu Ning, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon, Marnix Tack, Paul Raes