William B. Toms

13 papers B 1C 1Journal 4Unranked 7

Year	Rank	Type	Title / Venue / Authors
2023	B	`conf`	DiAD - Distributed Acceleration for Datacenter FPGAs. FPL Joshua Lant, Emmanouil Skordalakis, Kyriakos Paraskevas, William B. Toms, Mikel Luján, John Goodacre
2022	J	`jnl`	Energy-Efficient Encoding for High-Speed Serial Interfaces. IEEE Trans. Very Large Scale Integr. Syst. Eleni Maragkoudaki, William B. Toms, Vasilis F. Pavlidis
2021	—	`conf`	Energy Efficient Power-Management for Out-of-Order Processors Using Cyclic Power-Gating. ARCS William B. Toms, John Goodacre, Mikel Luján
2014	C	`conf`	Optimised Synthesis of Asynchronous Elastic Dataflows by Leveraging Clocked EDA. DSD Mahdi Jelodari Mamaghani, Jim D. Garside, William B. Toms, Doug A. Edwards
2013	J	`jnl`	Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. J. Circuits Syst. Comput. P. Balasubramanian, David A. Edwards, William B. Toms
2012	J	`jnl`	Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. VLSI Design P. Balasubramanian, David A. Edwards, William B. Toms
2011	J	`jnl`	Indicating combinational logic decomposition. IET Comput. Digit. Tech. William B. Toms, David A. Edwards
2010	—	`conf`	A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths. ACSD William B. Toms, David A. Edwards
2010	—	`conf`	M-of-N Code Decomposition for Indicating Combinational Logic. ASYNC William B. Toms, David A. Edwards
2009	—	`conf`	Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks. ASYNC William B. Toms, Doug A. Edwards
2006	—	`conf`	Synthesising Heterogeneously Encoded Systems. ASYNC William B. Toms, David A. Edwards, Andrew Bardsley
2005	—	`conf`	Efficient synthesis of speed-independent combinational logic circuits. ASP-DAC William B. Toms, David A. Edwards
2003	—	`conf`	Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes. ASYNC W. J. Bainbridge, William B. Toms, David A. Edwards, Stephen B. Furber