Wilfried Daehn

21 papers A* 1A 4C 1Journal 8Unranked 7
YearRankTypeTitle / Venue / Authors
2001 — conf
Demodulation based testing of off-chip driver performance.
ETW
Wilfried Daehn
1998 — conf
A Central Control Engine for an Open and Hybrid Simulation Environment.
DIS-RT
Werner van Almsick, Thorsten Drabe, Wilfried Daehn, Christian Müller-Schloer
1998 C conf
An Open Simulation and Modeling Environment for Embedded Real-Time Systems.
International Workshop on Rapid System Prototyping
Werner van Almsick, Thorsten Drabe, Wilfried Daehn, Christian Müller-Schloer
1995 J jnl
Electrosmog & electromagnetic CAD.
Future Gener. Comput. Syst.
Wilfried Daehn
1995 — conf
Fault modeling of differential ECL.
EURO-DAC
Udo Jorczyk, Wilfried Daehn, Oliver Neumann
1994 — conf
Distributed simulation for structural VHDL netlists.
EURO-DAC
David B. Bernstein, Werner van Almsick, Wilfried Daehn
1994 — conf
Electrosmog and Electromagnetic CAD (Invited Paper).
HPCN
Wilfried Daehn
1991 J jnl
Fault simulation using small fault samples.
J. Electron. Test.
Wilfried Daehn
1991 J jnl
Iterative algorithms for computing aliasing probabilities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Tom W. Williams
1991 J jnl
Load Balancing in a Hybrid ATPG Environment.
IEEE Trans. Computers
Wilfried Daehn
1990 — conf
Accelerated test pattern generation by cone-oriented circuit partitioning.
EURO-DAC
Torsten Grüning, Udo Mahlstedt, Wilfried Daehn, Cengiz Özcan
1990 A conf
Contest: A Fast ATPG Tool for Very Large Combinatorial Circuits.
ICCAD
Udo Mahlstedt, Torsten Grüning, Cengiz Özcan, Wilfried Daehn
1988 J jnl
Bounds and analysis of aliasing errors in linear feedback shift registers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
1987 J jnl
Aliasing Errors in Signature Analysis Registers.
IEEE Des. Test
Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
1986 A conf
A Test Generator IC for Testing Large CMOS-RAMs.
ITC
Wilfried Daehn, Josef Gross
1986 A* conf
A unified treatment of PLA faults by Boolean differences.
DAC
Wilfried Daehn
1986 A conf
Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials.
ITC
Tom W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
1986 J jnl
Self-Test in a Standard Cell Environment.
IEEE Des. Test
Joachim Mucha, Wilfried Daehn, Josef Gross
1982 — conf
Ein 32-Bit-Rechenwerk mit eingebautem Hardware-Selbsttest.
Fehlertolerierende Rechensysteme
G. Grassl, Wilfried Daehn, U. Ludemann, Ulrich Theus
1981 J jnl
A Hardware Approach to Self-Testing of Large Programmable Logic Arrays.
IEEE Trans. Computers
Wilfried Daehn, Joachim Mucha
1981 A conf
Hardware Test Pattern Generation for Built-In Testing.
ITC
Wilfried Daehn, Joachim Mucha