Wenping Wang

19 papers A* 2A 3Misc 1Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2013 J jnl
NBTI-aware circuit node criticality computation.
ACM J. Emerg. Technol. Comput. Syst.
Shengqi Yang, Wenping Wang, Mark Hagan, Wei Zhang, Pallav Gupta, Yu Cao
2011 J jnl
Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques.
IEEE Trans. Very Large Scale Integr. Syst.
Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang
2010 J jnl
The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis.
IEEE Trans. Very Large Scale Integr. Syst.
Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Frank Liu, Yu Cao
2009 — conf
A framework for estimating NBTI degradation of microarchitectural components.
ASP-DAC
Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan
2009 A conf
Gate replacement techniques for simultaneous leakage and aging optimization.
DATE
Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang
2009 — conf
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power.
ISQED
Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang
2009 J jnl
The Predictive Technology Model in the Late Silicon Era and Beyond.
Found. Trends Electron. Des. Autom.
Yu Cao, Asha Balijepalli, Saurabh Sinha, Chi-Chao Wang, Wenping Wang, Wei Zhao
2008 J jnl
Case Study of Reliability-Aware and Low-Power Design.
IEEE Trans. Very Large Scale Integr. Syst.
Shengqi Yang, Wenping Wang, Tiehan Lv, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie
2008 — conf
Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect.
ISQED
Wenping Wang, Shengqi Yang, Yu Cao
2008 A conf
Optimized Circuit Failure Prediction for Aging: Practicality and Promise.
ITC
Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra
2008 J jnl
Scalable model for predicting the effect of negative bias temperature instability for reliable design.
IET Circuits Devices Syst.
Sarvesh Bhardwaj, Wenping Wang, Rakesh Vattikonda, Yu Cao, Sarma B. K. Vrudhula
2008 — conf
Statistical prediction of circuit aging under process variations.
CICC
Wenping Wang, Vijay Reddy, Bo Yang, Varsha Balakrishnan, Srikanth Krishnan, Yu Cao
2007 — conf
An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology.
CICC
Wenping Wang, Vijay Reddy, Anand T. Krishnan, Rakesh Vattikonda, Srikanth Krishnan, Yu Cao
2007 A conf
An efficient method to identify critical gates under circuit aging.
ICCAD
Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao
2007 A* conf
The Impact of NBTI on the Performance of Combinational and Sequential Circuits.
DAC
Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Rakesh Vattikonda, Sarma B. K. Vrudhula, Frank Liu, Yu Cao
2006 A* conf
Modeling and minimization of PMOS NBTI effect for robust nanometer design.
DAC
Rakesh Vattikonda, Wenping Wang, Yu Cao
2006 — conf
Predictive Modeling of the NBTI Effect for Reliable Design.
CICC
Sarvesh Bhardwaj, Wenping Wang, Rakesh Vattikonda, Yu Cao, Sarma B. K. Vrudhula
2005 Misc conf
Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.
VLSI Design
Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang
2005 — conf
Low-leakage robust SRAM cell design for sub-100nm technologies.
ASP-DAC
Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie