Wenjie Li

19 papers A* 2Journal 14Unranked 3
YearRankTypeTitle / Venue / Authors
2025 J jnl
Adaptive Two-Range Quantization and Hardware Co-Design for Large Language Model Acceleration.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Siqi Cai, Gang Wang, Wenjie Li, Dongxu Lyu, Guanghui He
2025 J jnl
An Efficient Multi-View Cross-Attention Accelerator for Vision-Centric 3D Perception in Autonomous Driving.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dongxu Lyu, Zhenyu Li, Yansong Xu, Gang Wang, Wenjie Li, Yuzhou Chen, Liyan Chen, Weifeng He, Guanghui He
2025 A* conf
BitPattern: Enabling Efficient Bit-Serial Acceleration of Deep Neural Networks through Bit-Pattern Pruning.
DAC
Gang Wang, Siqi Cai, Zhenyu Li, Wenjie Li, Dongxu Lyu, Yanan Sun, Jianfei Jiang, Guanghui He
2025 J jnl
Efficient Hardware Architecture Design for Rotary Position Embedding of Large Language Models.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Wenjie Li, Gang Wang, Dongxu Lyu, Ningyi Xu, Guanghui He
2025 A* conf
KVO-LLM: Boosting Long-Context Generation Throughput for Batched LLM Inference.
DAC
Zhenyu Li, Dongxu Lyu, Gang Wang, Yuzhou Chen, Liyan Chen, Wenjie Li, Jianfei Jiang, Yanan Sun, Guanghui He
2025 J jnl
OFQ-LLM: Outlier-Flexing Quantization for Efficient Low-Bit Large Language Model Acceleration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gang Wang, Siqi Cai, Wenjie Li, Dongxu Lyu, Guanghui He
2024 J jnl
A Precision-Scalable Deep Neural Network Accelerator With Activation Sparsity Exploitation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wenjie Li, Aokun Hu, Ningyi Xu, Guanghui He
2024 J jnl
BSViT: A Bit-Serial Vision Transformer Accelerator Exploiting Dynamic Patch and Weight Bit-Group Quantization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gang Wang, Siqi Cai, Wenjie Li, Dongxu Lyu, Guanghui He
2024 J jnl
CoDA: A Co-Design Framework for Versatile and Efficient Attention Accelerators.
IEEE Trans. Computers
Wenjie Li, Aokun Hu, Ningyi Xu, Guanghui He
2024 J jnl
Hardware-oriented algorithms for softmax and layer normalization of large language models.
Sci. China Inf. Sci.
Wenjie Li, Dongxu Lyu, Gang Wang, Aokun Hu, Ningyi Xu, Guanghui He
2024 J jnl
Quantization and Hardware Architecture Co-Design for Matrix-Vector Multiplications of Large Language Models.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenjie Li, Aokun Hu, Ningyi Xu, Guanghui He
2023 J jnl
Low-Complexity Precision-Scalable Multiply-Accumulate Unit Architectures for Deep Neural Network Accelerators.
IEEE Trans. Circuits Syst. II Express Briefs
Wenjie Li, Aokun Hu, Gang Wang, Ningyi Xu, Guanghui He
2022 — conf
An Efficient Stochastic Convolution Accelerator based on Pseudo-Sobol Sequences.
NANOARCH
Aokun Hu, Wenjie Li, Dongxu Lv, Guanghui He
2022 J jnl
Efficient Compression Methods for Wire-Spread-Based Stochastic Computing Deep Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs
Wenjie Li, Ningyi Xu, Runsheng Wang, Guanghui He
2020 J jnl
Multi-Layer Generalized Integrated Interleaved Codes.
IEEE Commun. Lett.
Wenjie Li, Jun Lin, Zhongfeng Wang
2019 J jnl
A 124-Gb/s Decoder for Generalized Integrated Interleaved Codes.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenjie Li, Jun Lin, Zhongfeng Wang
2019 — conf
A Low-Complexity Error-and-Erasure Decoding Algorithm for t=2 RS Codes.
SiPS
Zengchao Yan, Wenjie Li, Jun Lin, Zhongfeng Wang
2019 J jnl
Modified GII-BCH Codes for Low-Complexity and Low-Latency Encoders.
IEEE Commun. Lett.
Wenjie Li, Jing Tian, Jun Lin, Zhongfeng Wang
2018 — conf
Fast and Low-Complexity Decoding Algorithm and Architecture for Quadruple-Error-Correcting RS codes.
APCCAS
Zengchao Yan, Wenjie Li, Jun Lin, Zhongfeng Wang