Weiwei Shi

32 papers C 1Journal 13Unranked 18
YearRankTypeTitle / Venue / Authors
2025 J jnl
An Area-Energy-Efficient 64-2048 Point FFT With Approximate Plane-Fitting Complex Multipliers.
IEEE Trans. Very Large Scale Integr. Syst.
Weiwei Shi, Jiasheng Wu, Yida Yuan, Zhihong Mo, Chaoyuan Wu, Jiangwei He
2025 J jnl
Design of a CNN Accelerator for Multitask EEG Signal Classification Based on RISC-V.
IEEE Trans. Very Large Scale Integr. Syst.
Weiwei Shi, Haoren Qin, Jiasheng Wu, Jingbin Mai
2025 J jnl
EEG Motor Imagery Processing System Design and Efficient Hardware Implementation.
IEEE Trans. Circuits Syst. II Express Briefs
Weiwei Shi, Kaifu Feng, Chaoyuan Wu
2025 J jnl
Hybrid Approximate Multipliers With Merits Balance for Digital Processing and Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst.
Weiwei Shi, Xiaocong Cao, Zhuoliang Zou, Yuping Gao, Jiasheng Wu
2024 — conf
A Configurable EEG Procesing Driver Chip for Wireless Wearable Devices.
ICTA
Ruijie Xue, Weiwei Shi, Yang Hong
2024 — conf
An Area-Energy Efficient EEG Detection System Based On PWL and Nonlinear SVM.
BioCAS
Guijie Cao, Weiwei Shi, Jiasheng Wu, Zhihong Mo, Yuping Gao
2024 J jnl
Area-Delay-Energy-Efficient Approximate Dividers Based on Piecewise Linear Fitting of Surface.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chaoyuan Wu, Weiwei Shi, Yida Yuan, Zhuoliang Zou, Zhihong Mo, Jiangwei He
2023 — conf
An EEG Signal Processing System Design with Approximate Operations.
ICTA
Ziliang Yin, Weiwei Shi, Kezhu Liu
2023 J jnl
Cost effective Tanh activation function circuits based on fast piecewise linear logic.
Microelectron. J.
Kezhu Liu, Weiwei Shi, Canji Huang, Dongdong Zeng
2022 J jnl
Arithmetic and Logic Circuits Based on ITO-Stabilized ZnO TFT for Transparent Electronics.
IEEE Trans. Circuits Syst. I Regul. Pap.
Weiwei Shi, Lizhi Hu, Yuan Liu, Sunbin Deng, Yuming Xu, Hoi-Sing Kwok, Rongsheng Chen
2022 J jnl
Implementation of SVM-Based Low Power EEG Signal Classification Chip.
IEEE Trans. Circuits Syst. II Express Briefs
Yongqian Su, Weiwei Shi, Lizhi Hu, Suixing Zhuang
2020 — conf
Design of basic block of neural signal detection chip.
ICTA
Yongqian Su, Yang Hong, Weiwei Shi, Mengtao Ye, Lizhi Hu
2020 — conf
Pseudo-NMOS Logic Circuits using ITO-Stabilized ZnO TFTs.
ICTA
Lizhi Hu, Yang Hong, Weiwei Shi, Mengtao Ye, Yongqian Su
2019 J jnl
A 0.4 V 298 nJ/op Neural Signal Spectral Feature Extraction Module With Novel Approximate MACs and Custom Compressors.
IEEE Trans. Circuits Syst. II Express Briefs
Weiwei Shi, Yuan Xu, Chiu-sing Choy, Zhiyong Chen, Junwei Yang, Robert K. F. Teng, Mei Jiang, X. Deng
2019 — conf
A 63.3ps TDC Measurement System Based on FPGA for Pulsed Laser Ranging.
ASICON
Zhiyong Chen, Weiwei Shi, Guoqiang Xiong, Junwei Yang, Yuan Xu
2019 — conf
A Optimized PPD CMOS Pixel with 26.09 % Transfer Efficiency Improvement and 43.34 % Crosstalk Suppression for I-ToF Application.
ASICON
Junwei Yang, Weiwei Shi, Zhiyu Huang, Yuan Xu, Yanghao Zheng, Xuanbin Fang
2018 J jnl
A 0.35 V 376 Mb/s Configurable Long Integer Multiplier for Subthreshold Encryption.
IEEE Trans. Circuits Syst. II Express Briefs
Weiwei Shi, Hai-Peng Wang, Chiu-sing Choy, Junwei Yang, Mei Jiang, Robert K. F. Teng, Mingcheng Zhu
2018 J jnl
A Subthreshold Baseband Processor Core Design With Custom Modules and Cells for Passive RFID Tags.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weiwei Shi, An Pan, Shi Yu, Chiu-sing Choy
2018 J jnl
Hardware Design of Real Time Epileptic Seizure Detection Based on STFT and SVM.
IEEE Access
Hongda Wang, Weiwei Shi, Chiu-sing Choy
2018 — conf
Mixed Design of SPAD Array Based TOF for Depth Camera and Unmanned Vehicle Applications.
SMACD
Weiwei Shi, An Pan
2017 — conf
Integrating channel selection and feature selection in a real time epileptic seizure detection system.
EMBC
Hongda Wang, Weiwei Shi, Chiu-sing Choy
2016 — conf
A 0.4V 320Mb/s 28.7µW 1024-bit configurable multiplier for subthreshold SOC encryption.
SoCC
Weiwei Shi, Chiu-sing Choy
2016 — conf
Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and Cells.
ISVLSI
Weiwei Shi, Zhao Guangdong, Oliver Chiu-sing Choy
2015 — conf
Subthreshold passive RFID tag's baseband processor core design with custom modules and cells.
ICECS
Weiwei Shi, Linqing Fu, Chiu-sing Choy
2014 — conf
A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below.
SoCC
Weiwei Shi, Oliver Chiu-sing Choy
2014 — conf
Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells.
ICECS
Weiwei Shi, Oliver Chiu-sing Choy
2013 — conf
An open 45nm PD-SOI standard cell library based on verified BSIM SOI spice model with predictive technology.
ASICON
Liwei Gong, Yuan Xu, Zhi Zhang, Weiwei Shi, Robert K. F. Teng
2013 — conf
Key component designs of subthreshold baseband processors in passive RF device.
ASICON
Weiwei Shi, Oliver Chiu-sing Choy, Robert K. F. Teng
2012 — conf
A process-compatible passive RFID tag's digital design for subthreshold operation.
ICECS
Weiwei Shi, Oliver Chiu-sing Choy
2010 J jnl
RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology.
J. Low Power Electron.
Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun, Lincoln Lai Kan Leung, Jianping Guo, Yuen Sum Ng, Chi Fat Chan, Weiwei Shi, Yang Hong, Marco Ho, Ki-Leung Mak, Yanqing Ai
2009 C conf
A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders.
ISCAS
Chi Fat Chan, Weiwei Shi, Kong-Pang Pun, Lincoln Lai Kan Leung, Ka Nang Leung, Oliver Chiu-sing Choy
2008 — conf
Design of passive UHF RFID tag in 130nm CMOS technology.
APCCAS
Yang Hong, Chi Fat Chan, Jianping Guo, Yuen Sum Ng, Weiwei Shi, Lincoln Lai Kan Leung, Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun