| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | — | conf |
ISSCC
|
| 2026 | — | conf |
ASP-DAC
|
| 2026 | J | jnl |
Reliab. Eng. Syst. Saf.
|
| 2025 | — | conf |
ISSCC
|
| 2025 | — | conf |
ISSCC
|
| 2025 | — | conf |
ISSCC
|
| 2025 | C | conf |
ISCAS
|
| 2025 | J | jnl |
IEEE J. Solid State Circuits
|
| 2025 | C | conf |
ISCAS
|
| 2025 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2025 | J | jnl |
IEEE J. Solid State Circuits
|
| 2025 | J | jnl |
IEEE J. Solid State Circuits
|
| 2025 | J | jnl |
IEEE Solid State Circuits Lett.
|
| 2025 | C | conf |
ISCAS
|
| 2025 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2025 | — | conf |
ASP-DAC
|
| 2025 | — | conf |
Balancing Objective Optimization and Constraint Satisfaction for Robust Analog Circuit Optimization.
ASP-DAC
|
| 2025 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2025 | A | conf |
DATE
|
| 2025 | J | jnl |
CoRR
|
| 2025 | A* | conf |
DAC
|
| 2025 | C | conf |
ISCAS
|
| 2024 | — | conf |
ISSCC
|
| 2024 | — | conf |
ISSCC
|
| 2024 | J | jnl |
IEEE J. Solid State Circuits
|
| 2024 | — | conf |
ICTA
|
| 2024 | — | conf |
A-SSCC
|
| 2024 | — | conf |
CICC
|
| 2024 | — | conf |
A-SSCC
|
| 2024 | A | conf |
ICCAD
|
| 2024 | J | jnl |
CoRR
|
| 2024 | J | jnl |
IEEE J. Solid State Circuits
|
| 2024 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2024 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2024 | A | conf |
ICCAD
|
| 2024 | J | jnl |
CoRR
|
| 2024 | — | conf |
ACM TUR-C
|
| 2024 | J | jnl |
CoRR
|
| 2024 | J | jnl |
Integr.
|
| 2023 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2023 | — | conf |
ISSCC
|
| 2023 | — | conf |
ISSCC
|
| 2023 | — | conf |
CICC
|
| 2023 | — | conf |
CICC
|
| 2023 | — | conf |
ICTA
|
| 2023 | J | jnl |
IEEE J. Solid State Circuits
|
| 2023 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2023 | J | jnl |
Sci. China Inf. Sci.
|
| 2023 | J | jnl |
IEEE J. Solid State Circuits
|
| 2023 | J | jnl |
Microelectron. J.
|
| 2023 | J | jnl |
Integr.
|
| 2023 | C | conf |
ISCAS
|
| 2023 | A | conf |
ICCAD
|
| 2023 | — | conf |
A-SSCC
|
| 2022 | — | conf |
ICTA
|
| 2022 | — | conf |
APCCAS
|
| 2022 | — | conf |
ICTA
|
| 2022 | — | conf |
CICC
|
| 2022 | J | jnl |
IEEE Trans. Biomed. Circuits Syst.
|
| 2022 | A* | conf |
DAC
|
| 2021 | J | jnl |
IEEE J. Solid State Circuits
|
| 2021 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2021 | — | conf |
ESSDERC
|
| 2021 | — | conf |
ESSCIRC
|
| 2021 | — | conf |
A-SSCC
|
| 2021 | — | conf |
Design of an ultra-low Power MFCC Feature Extraction Circuit with Embedded Speech Activity Detector.
ICTA
|
| 2021 | — | conf |
ICTA
|
| 2021 | J | jnl |
IEEE J. Solid State Circuits
|
| 2020 | — | conf |
ISSCC
|
| 2020 | J | jnl |
IEEE J. Solid State Circuits
|
| 2020 | J | jnl |
IEEE Trans. Circuits Syst.
|
| 2020 | — | conf |
An Energy-Efficient Time-Domain Binary Neural Network Accelerator with Error-Detection in 28nm CMOS.
APCCAS
|
| 2020 | — | conf |
ICTA
|
| 2020 | J | jnl |
IEEE J. Solid State Circuits
|
| 2020 | J | jnl |
IEEE J. Solid State Circuits
|
| 2020 | — | conf |
ISGT-Europe
|
| 2019 | — | conf |
VLSI Circuits
|
| 2019 | — | conf |
APCCAS
|
| 2019 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2019 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2019 | — | conf |
NANOARCH
|
| 2019 | — | conf |
APSIPA
|
| 2019 | — | conf |
ACM Great Lakes Symposium on VLSI
|
| 2019 | — | conf |
NANOARCH
|
| 2018 | — | conf |
A-SSCC
|
| 2018 | — | conf |
TrustCom/BigDataSE
|
| 2018 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2018 | J | jnl |
IEEE Access
|
| 2018 | — | conf |
TrustCom/BigDataSE
|
| 2018 | J | jnl |
J. Circuits Syst. Comput.
|
| 2018 | — | conf |
TrustCom/BigDataSE
|
| 2018 | C | conf |
ISCAS
|
| 2018 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2018 | — | conf |
Short-path Padding Method for Timing Error Resilient Circuits based on Transmission Gates Insertion.
ACM Great Lakes Symposium on VLSI
|
| 2018 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2017 | — | conf |
A-SSCC
|
| 2017 | J | jnl |
IEICE Electron. Express
|
| 2017 | — | conf |
A-SSCC
|
| 2017 | J | jnl |
IEEE Access
|
| 2016 | J | jnl |
IEICE Electron. Express
|
| 2015 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2014 | A* | conf |
DAC
|
| 2014 | — | conf |
APCCAS
|
| 2014 | J | jnl |
IEICE Electron. Express
|
| 2013 | J | jnl |
IEICE Electron. Express
|
| 2013 | J | jnl |
IEICE Electron. Express
|
| 2013 | J | jnl |
IEEE Trans. Instrum. Meas.
|
| 2013 | J | jnl |
Int. J. Inf. Commun. Technol.
|
| 2013 | J | jnl |
IEICE Electron. Express
|
| 2012 | — | conf |
CyberC
|
| 2012 | — | conf |
ICDMA
|
| 2012 | — | conf |
CyberC
|
| 2012 | — | conf |
CyberC
|
| 2012 | — | conf |
CyberC
|
| 2011 | J | jnl |
IEICE Trans. Electron.
|
| 2009 | C | conf |
IDEAL
|
| 2009 | J | jnl |
J. Circuits Syst. Comput.
|
| 2008 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2005 | — | conf |
FSKD (1)
|