Weihang Tan

18 papers A* 1A 2C 1Journal 10Unranked 4
YearRankTypeTitle / Venue / Authors
2025 A conf
HEDWIG: Homomorphic Encryption Accelerator Design Using BFV-HPS With HiGh-Speed Fixed-Point Approximation.
FPGA
Antian Wang, Weihang Tan, Zhenyu Xu, Tao Wei, Caiwen Ding, Keshab K. Parhi, Yingjie Lao
2024 J jnl
Analysis of Dead Reckoning Accuracy in Swarm Robotics System.
CoRR
Weihang Tan, Timothy Anglea, Yongqiang Wang
2024 C conf
Area-Efficient Matrix-Vector Polynomial Multiplication Architecture for ML-KEM Using Interleaving and Folding Transformation.
ISCAS
Weihang Tan, Yingjie Lao, Keshab K. Parhi
2024 J jnl
PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption.
IEEE Trans. Inf. Forensics Secur.
Weihang Tan, Sin-Wei Chiu, Antian Wang, Yingjie Lao, Keshab K. Parhi
2023 J jnl
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.
IEEE Trans. Computers
Weihang Tan, Antian Wang, Xinmiao Zhang, Yingjie Lao, Keshab K. Parhi
2023 A conf
KyberMat: Efficient Accelerator for Matrix-Vector Polynomial Multiplication in CRYSTALS-Kyber Scheme via NTT and Polyphase Decomposition.
ICCAD
Weihang Tan, Yingjie Lao, Keshab K. Parhi
2023 J jnl
KyberMat: Efficient Accelerator for Matrix-Vector Polynomial Multiplication in CRYSTALS-Kyber Scheme via NTT and Polyphase Decomposition.
CoRR
Weihang Tan, Yingjie Lao, Keshab K. Parhi
2023 A* conf
NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation.
DAC
Antian Wang, Bingyin Zhao, Weihang Tan, Yingjie Lao
2023 J jnl
PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption.
CoRR
Weihang Tan, Sin-Wei Chiu, Antian Wang, Yingjie Lao, Keshab K. Parhi
2022 — conf
Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography.
DFT
Antian Wang, Weihang Tan, Keshab K. Parhi, Yingjie Lao
2022 J jnl
Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography.
CoRR
Antian Wang, Weihang Tan, Keshab K. Parhi, Yingjie Lao
2021 J jnl
An Ultra-Highly Parallel Polynomial Multiplier for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme.
J. Signal Process. Syst.
Weihang Tan, Benjamin M. Case, Gengran Hu, Shuhong Gao, Yingjie Lao
2021 J jnl
High-Speed Modular Multiplier for Lattice-Based Cryptosystems.
IEEE Trans. Circuits Syst. II Express Briefs
Weihang Tan, Benjamin M. Case, Antian Wang, Shuhong Gao, Yingjie Lao
2021 J jnl
Low-Latency VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography.
CoRR
Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, Keshab K. Parhi
2021 J jnl
NoPUF: A Novel PUF Design Framework Toward Modeling Attack Resistant PUFs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Antian Wang, Weihang Tan, Yuejiang Wen, Yingjie Lao
2021 — conf
Pipelined High-Throughput NTT Architecture for Lattice-Based Cryptography.
AsianHOST
Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, Keshab K. Parhi
2020 — conf
Area-Efficient Pipelined VLSI Architecture for Polar Decoder.
ISVLSI
Weihang Tan, Antian Wang, Yunhao Xu, Yingjie Lao
2019 — conf
An Efficient Polynomial Multiplier Architecture for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme.
SiPS
Weihang Tan, Aengran Au, Benjamin Aase, Shuhong Aao, Yingjie Lao