Weidong Cao

39 papers A* 10A 6C 2Journal 18Unranked 3
YearRankTypeTitle / Venue / Authors
2026 A* conf
ASPA: Reassigning DDR5 Parity Bandwidth.
HPCA
Fan Li, Qiufeng Li, Yanan Guo, Weidong Cao, Xin Xin
2026 J jnl
Systematic Methodology of Modeling and Design Space Exploration for CMOS Image Sensors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianrui Ma, Zhe Gao, Zhe Chen, Ramakrishna Kakarala, Charles Shan, Weidong Cao, Xuan Zhang
2025 J jnl
A Hybrid-Domain Floating-Point Compute-in-Memory Architecture for Efficient Acceleration of High-Precision Deep Neural Networks.
CoRR
Zhiqiang Yi, Yiwen Liang, Weidong Cao
2025 A* conf
AnalogGenie-Lite: Enhancing Scalability and Precision in Circuit Topology Discovery through Lightweight Graph Modeling.
ICML
Jian Gao, Weidong Cao, Xuan Zhang
2025 A* conf
AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies.
ICLR
Jian Gao, Weidong Cao, Junyi Yang, Xuan Zhang
2025 J jnl
AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies.
CoRR
Jian Gao, Weidong Cao, Junyi Yang, Xuan Zhang
2025 A* conf
EVA: An Efficient and Versatile Generative Engine for Targeted Discovery of Novel Analog Circuits.
DAC
Jian Gao, Weimin Fu, Xiaolong Guo, Weidong Cao, Xuan Zhang
2025 A* conf
Late Breaking Results: Opera: An Open and Efficient Platform for Data-driven Synthesis of Analog Circuits.
DAC
Shikai Wang, Yaolong Hu, Zhiqiang Yi, Taiyun Chi, Weidong Cao
2025 A conf
LoRASensE: Learnable Low-Rank Acquisition in Sensors for Efficient Edge Machine Vision.
ISLPED
Yiwen Liang, Zhiqiang Yi, Tianrui Ma, Weidong Cao
2025 J jnl
RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization With Knowledge-Infused Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weidong Cao, Jian Gao, Tianrui Ma, Rui Ma, Mouhacine Benosman, Xuan Zhang
2024 A* conf
Addition is Most You Need: Efficient Floating-Point SRAM Compute-in-Memory by Harnessing Mantissa Addition.
DAC
Weidong Cao, Jian Gao, Xin Xin, Xuan Zhang
2024 J jnl
Efficient Processing of MLPerf Mobile Workloads Using Digital Compute-In-Memory Macros.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoyu Sun, Weidong Cao, Brian Crafton, Kerem Akarvardar, Haruki Mori, Hidehiro Fujiwara, Hiroki Noguchi, Yu-Der Chih, Meng-Fan Chang, Yih Wang, Tsung-Yung Jonathan Chang
2024 J jnl
Estimating Power, Performance, and Area for On-Sensor Deployment of AR/VR Workloads Using an Analytical Framework.
ACM Trans. Design Autom. Electr. Syst.
Xiaoyu Sun, Xiaochen Peng, Sai Qian Zhang, Jorge Gomez, Win-San Khwa, Syed Shakib Sarwar, Ziyun Li, Weidong Cao, Zhao Wang, Chiao Liu, Meng-Fan Chang, Barbara De Salvo, Kerem Akarvardar, H.-S. Philip Wong
2024 J jnl
RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learning.
CoRR
Weidong Cao, Jian Gao, Tianrui Ma, Rui Ma, Mouhacine Benosman, Xuan Zhang
2023 C conf
A/D Alleviator: Reducing Analog-to-Digital Conversions in Compute-In-Memory with Augmented Analog Accumulation.
ISCAS
Weidong Cao, Xuan Zhang
2023 A* conf
CktGNN: Circuit Graph Neural Network for Electronic Design Automation.
ICLR
Zehao Dong, Weidong Cao, Muhan Zhang, Dacheng Tao, Yixin Chen, Xuan Zhang
2023 J jnl
CktGNN: Circuit Graph Neural Network for Electronic Design Automation.
CoRR
Zehao Dong, Weidong Cao, Muhan Zhang, Dacheng Tao, Yixin Chen, Xuan Zhang
2023 A* conf
LeCA: In-Sensor Learned Compressive Acquisition for Efficient Machine Vision on the Edge.
ISCA
Tianrui Ma, Adith Jagadish Boloor, Xiangxing Yang, Weidong Cao, Patrick Williams, Nan Sun, Ayan Chakrabarti, Xuan Zhang
2023 C conf
Non-Hermitian Physics-Inspired Voltage-Controlled Oscillators with Resistive Tuning.
ISCAS
Weidong Cao, Hua Wang, Xuan Zhang
2023 J jnl
Non-Hermitian Physics-Inspired Voltage-Controlled Oscillators with Resistive Tuning.
CoRR
Weidong Cao, Hua Wang, Xuan Zhang
2023 A conf
PDNSig: Identifying Multi-Tenant Cloud FPGAs with Power Distribution Network-Based Signatures.
ICCAD
Huifeng Zhu, Weidong Cao, Xuan Zhang
2023 A* conf
RoSE: Robust Analog Circuit Parameter Optimization with Sampling-Efficient Reinforcement Learning.
DAC
Jian Gao, Weidong Cao, Xuan Zhang
2022 J jnl
Demonstration of fully integrated parity-time-symmetric electronics.
CoRR
Weidong Cao, Changqing Wang, Weijian Chen, Song Hu, Hua Wang, Lan Yang, Xuan Zhang
2022 J jnl
Domain Knowledge-Based Automated Analog Circuit Design with Deep Reinforcement Learning.
CoRR
Weidong Cao, Mouhacine Benosman, Xuan Zhang, Rui Ma
2022 J jnl
Domain Knowledge-Infused Deep Learning for Automated Analog/Radio-Frequency Circuit Parameter Optimization.
CoRR
Weidong Cao, Mouhacine Benosman, Xuan Zhang, Rui Ma
2022 A* conf
Domain knowledge-infused deep learning for automated analog/radio-frequency circuit parameter optimization.
DAC
Weidong Cao, Mouhacine Benosman, Xuan Zhang, Rui Ma
2022 A conf
HOGEye: Neural Approximation of HOG Feature Extraction in RRAM-Based 3D-Stacked Image Sensors.
ISLPED
Tianrui Ma, Weidong Cao, Fei Qiao, Ayan Chakrabarti, Xuan Zhang
2022 J jnl
Neural-PIM: Efficient Processing-In-Memory With Neural Approximation of Peripherals.
IEEE Trans. Computers
Weidong Cao, Yilong Zhao, Adith Boloor, Yinhe Han, Xuan Zhang, Li Jiang
2022 J jnl
Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals.
CoRR
Weidong Cao, Yilong Zhao, Adith Boloor, Yinhe Han, Xuan Zhang, Li Jiang
2022 A conf
PowerTouch: A Security Objective-Guided Automation Framework for Generating Wired Ghost Touch Attacks on Touchscreens.
ICCAD
Huifeng Zhu, Zhiyuan Yu, Weidong Cao, Ning Zhang, Xuan Zhang
2021 J jnl
Evaluating Neural Network-Inspired Analog-to-Digital Conversion With Low-Precision RRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weidong Cao, Liu Ke, Ayan Chakrabarti, Xuan Zhang
2020 J jnl
NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weidong Cao, Xin He, Ayan Chakrabarti, Xuan Zhang
2019 A conf
NeuADC: Neural Network-Inspired RRAM-Based Synthesizable Analog-to-Digital Conversion with Reconfigurable Quantization Support.
DATE
Weidong Cao, Xin He, Ayan Chakrabarti, Xuan Zhang
2019 A conf
Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices.
ICCAD
Weidong Cao, Liu Ke, Ayan Chakrabarti, Xuan Zhang
2019 J jnl
Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices.
CoRR
Weidong Cao, Liu Ke, Ayan Chakrabarti, Xuan Zhang
2018 J jnl
A power scalable 2-10 Gb/s PI-based clock data recovery for multilane applications.
Microelectron. J.
Fangxu Lv, Xuqiang Zheng, Feng Zhao, Jianye Wang, Shigang Yue, Ziqiang Wang, Weidong Cao, Yajun He, Chun Zhang, Hanjun Jiang, Zhihua Wang
2016 — conf
A 28-Gb/s transmitter with 3-tap FFE and T-coil enhanced terminal in 65-nm CMOS technology.
NEWCAS
Naiwen Zhou, Linghan Wu, Ziqiang Wang, Xuqiang Zheng, Weidong Cao, Chun Zhang, Fule Li, Zhihua Wang
2015 — conf
A 40Gb/s 27mW 3-tap closed-loop decision feedback equalizer in 65nm CMOS.
NEWCAS
Weidong Cao, Ziqiang Wang, Dongmei Li, Xuqiang Zheng, Ke Huang, Shuai Yuan, Fule Li, Zhihua Wang
2015 — conf
A 40Gb/s 39mW 3-tap adaptive closed-loop decision feedback equalizer in 65nm CMOS.
MWSCAS
Weidong Cao, Ziqiang Wang, Dongmei Li, Xuqiang Zheng, Fule Li, Chun Zhang, Zhihua Wang